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C8051系列单片机FLASH自编程


AN129
WRITING TO FLASH FROM APPLICATION CODE Relevant Devices
This application note applies to the following devices: C8051F000, C8051F001, C8051F006, C8051F007, C8051F012, C8051F01

5, C8051F206, C8051F220, C8051F230, C8051F231, C8051F021, C8051F022, C8051F301, C8051F302, and C8051F305. C8051F002, C8051F010, C8051F016, C8051F221, C8051F236, C8051F023, C8051F303, C8051F005, C8051F011, C8051F017, C8051F226, C8051F020, C8051F300, C8051F304,



In 'C', the pointer used to de-reference FLASH writes should NOT be located in xdata space (data and idata are appropriate).

Items of Note
Be cautious when using the ‘Large’ and ‘Compact’ memory models, which target xdata and pdata spaces for user variables, both of which generate MOVX write opcodes. In the C8051F30x series devices, a Lock and Key sequence must be executed before each FLASH write or erase operation. In the C8051F30x series devices, attempts to read, write, or erase code memory locations located in RESERVED space will generate a device reset. Attempts to read, write, or erase code memory locations in RESERVED space will be ignored by the hardware on non-C8051F30x devices. The CPU is stalled during FLASH write and erase operations, although peripherals (UART, ADC, timers, etc.) remain active. Interrupts which are posted during a FLASH write or erase operation will be held pending until the completion of the FLASH operation, after which time they will be serviced in priority order.

Note: This application note replaces AN109 (formerly AN09).



Introduction

The FLASH memory on all Silicon Labs MCU devices is writable from application code. This capability allows user software to store values to the FLASH, such as calibration constants or system parameters, and to implement a boot loading feature in which user firmware can be updated in-system from a remote site. This document starts with the basics of writing to FLASH from application code on any Silicon Labs MCU device. Then it discusses details specific to each device series. Example code for each device series that shows how to read and write FLASH is included at the end of this note.

Key Points
Disable interrupts before setting PSWE to ‘1’ to prevent interrupt service routines, which may access variables in xdata space, from generating MOVX writes which could corrupt FLASH memory. It is strongly recommended that the VDD monitor be enabled during FLASH write and erase operations to prevent data corruption resulting from power irregularities or power-down conditions.

FLASH Essentials
The FLASH in different device series has many similarities including page sizes, lock bits, and the instructions used to read and write to FLASH. The main differences are the amount of FLASH available, how the VDD monitor is enabled, and how SFR registers are modified to allow FLASH writes and erases.



Rev. 2.1 12/03

Copyright 2003 by Silicon Laboratories

AN129-DS21

AN129
FLASH Organization
The FLASH memory of all devices is organized into a set of 512-byte pages. Figure 1 shows the FLASH organization for the C8051F30x series. FLASH erase operations occur on page boundaries. The erase operation sets all the bits in the FLASH page to logic 1. FLASH write operations, which set bits to logic 0, occur on single byte boundaries. Although the CPU is stalled during FLASH write and erase operations, peripherals (UART, ADC, timers, etc.) remain active. Interrupts posted during a FLASH write or erase operation are held until the FLASH operation has completed, after which time they are serviced in priority order.

FLASH Read, Write, and Erase Operations
FLASH read operations are accomplished by using the standard 8051 MOVC instruction (in the ‘C’ language, MOVC instructions are generated by using pointers of memory type ‘code’). FLASH write and erase operations on Silicon Labs MCU devices are accomplished by using the MOVX instruction. The default target for MOVX write operations is external memory (XRAM); however, devices can be configured such that MOVX write operations target FLASH memory instead. MOVX instructions are generated in ‘C’ by using pointers of memory type ‘xdata’.

Precautions
It is strongly recommended that the VDD monitor be enabled during FLASH write and erase operations to prevent data corruption resulting from power irregularities or power-down conditions. All Silicon Labs MCU devices have a VDD monitor; however, they are enabled using different methods.

MOVX and PSCTL
MOVX write operations on all Silicon Labs MCU devices can target FLASH by setting bits in the PSCTL register. When the PSWE bit (PSCTL.0) is set to a logic 1, MOVX writes target FLASH memory instead of External Memory (XRAM). When both PSWE and PSEE (PSCTL.0 and PSCTL.1) are set to logic 1, MOVX writes erase the FLASH page containing the target address.

PROGRAM MEMORY
0x1FFF

Reserved
0x1E00

Lock Byte

0x1DFF 0x1DFE 0x1C00

Lock Byte Decoding

Bit
7 6 5 4 3 2 1 0

Description
if any of these are '0', FLASH is Write/ Erase locked across the C2 interface if any of these are '0', FLASH is Read locked across the C2 interface

FLASH memory organized in 512-byte pages
0x0200 0x0000

Figure 1. FLASH Memory Organization and Security for the C8051F30x Series

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AN129
Storing Calibration Constants in FLASH
To store calibration constants in FLASH, a variable of memory type ‘code’ is declared and all bits are initialized to logic 1. The initialization is needed since a FLASH write can only write zeros. A pointer of memory type ‘xdata’ is initialized to the address of the variable and used to write its contents. by 0xF1. FLASH read operations, which use the MOVC instruction, do not require a key sequence. The MOVX write following the write of 0xF1 to FLKEY will initiate the FLASH write or erase operation. If the FLKEY sequence is not properly executed prior to the MOVX write, the write or erase operation will have no effect.

FLASH write or erase operations that target the RESERVED address space will automatically fail, regardless of the lock and key sequence, and will Updating FLASH Values generate a device RESET. Following this reset, the To update data stored in FLASH memory, the FERROR bit (RSTSRC.6) will be set to a logic 1. entire page of FLASH must first be erased. A good Writes to the FLASH page containing the FLASH way to update a single byte (or subset of bytes) is Lock Byte are permitted from user code. Erases to as follows: that FLASH page are prohibited and can only be accomplished through the C2 interface. 1. Copy the FLASH page to a temporary storage location (RAM or an erased ‘scratch’ FLASH Erasing a FLASH Page page). A FLASH page can be erased by the following pro2. Erase the data FLASH page. cedure: 3. Copy the updated contents from the temporary 1. Disable interrupts. storage location back to the data FLASH page. 2. Set PSWE and PSEE to ‘1’s by writing PSCTL = 0x03.

FLASH Programming with the ‘F30x Series
Enabling the VDD monitor

3. Write the first key code (FLKEY = 0xA5). 4. Write the second key code (FLKEY = 0xF1).

The VDD monitor on the ‘F30x series is enabled 5. Write a data byte to any location within the by writing a ‘1’ to the PORSF bit (RSTSRC.1). 512-byte page to be erased. Please note that enabling the VDD monitor may immediately generate a system reset so it may be 6. Set PSEE to ‘0’ if no further erases are neceshelpful to enable it at the beginning of the main sary. routine. 7. Restore interrupts if originally enabled.

Lock and Key: FLKEY

To protect code space from an inadvertent FLASH Writing a FLASH Byte write operation, a lock and key mechanism is sup- The following procedure is used to write a byte to ported. Before each FLASH write or erase opera- FLASH: tion, the “FLKEY” SFR register must be loaded with the following byte sequence: 0xA5 followed 1. Disable interrupts.
Rev. 2.1 3

AN129
2. Set PSWE to ‘1’ by writing PSCTL = 0x01 5. Set PSEE to ‘0’ if no further erases are necessary. (PSEE must be ‘0’). 3. Write the first key code (FLKEY = 0xA5). 4. Write the second key code (FLKEY = 0xF1). 7. Restore interrupts if originally enabled. 5. Write the data to an erased byte. 6. Set PSWE to ‘0’ if no further writes are necesThe following procedure is used to write a byte to sary. FLASH: 7. Restore interrupts if originally enabled. 1. Disable interrupts. 6. Clear FLWE (FLSCL &= ~0x01) if no further writes or erases are neccessary.

Writing a FLASH Byte

FLASH Programming with the ‘F02x Series
Enabling the VDD Monitor

2. Set FLWE (FLSCL |= 0x01). 3. Set PSWE to ‘1’ by writing PSCTL = 0x01 (PSEE must be ‘0’).

The VDD monitor on the ‘F02x series is enabled 4. Write the data to an erased byte. by tying the MONEN pin high to VDD. 5. Set PSWE to ‘0’ if no further writes are necessary.

FLASH Memory Control: FLSCL

In the ‘F02x series devices, FLWE (FLSCL.0) must 6. Clear FLWE (FLSCL &= ~0x01) if no further be set to ‘1’ to allow FLASH writes/erases from writes or erases are neccessary. user software. This bit provides an added level of protection from unwanted FLASH writes and 7. Restore interrupts if originally enabled. erases. The rest of the bits in the FLSCL register should be left at their reset values.

Using the Scratchpad Memory

The scrachpad memory on the ‘F02x series is a 128-byte sector of FLASH memory located at A FLASH page can be erased by the following pro- 0x0000 - 0x007F when the SFLE (PSCTL.2) bit is cedure: set to 1. Note that when the SFLE bit is set, the main FLASH memory from 0x0000 - 0xFDFF is 1. Disable interrupts. not accessible from application code. Also note that debugging operations are not supported while 2. Set FLWE (FLSCL |= 0x01). SFLE = ‘1’.

Erasing a FLASH Page

3. Set PSWE and PSEE to ‘1’s by writing PSCTL = 0x03. 4. Write a data byte to any location within the 512-byte page to be erased.

FLASH Programming with the ‘F00x and ‘F01x and ‘F2xx Series

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AN129
The VDD monitor on the ‘F00x and the ‘F01x 2. Set FLSCL based on the current system clock devices is always enabled. The VDD monitor on value as specified in the Silicon Labs device the ‘F2xx devices is enabled by tying the MONEN data sheet (FLSCL = 0x86 when using the pin directly to VDD. default 2 MHz internal oscillator).

FLASH Memory Timing Prescaler: FLSCL

3. Set PSWE to ‘1’ by writing PSCTL = 0x01 (PSEE must be ‘0’).

The first four bits of FLSCL hold the system clock 4. Write the value to the byte. dependent prescaler value FLASCL. This prescaler determines the time interval for write/erase opera- 5. Set PSWE to ‘0’ if no further writes are necessary. tions. If the prescaler is set to 1111b, write/erase operations are disabled. The remaining bits in the FLSCL register should be left at their reset values. 6. Restore interrupts if originally enabled.

Erasing a FLASH Page
A FLASH page can be erased by the following procedure: 1. Disable interrupts. 2. Set FLSCL based on the current system clock value as specified in the Silicon Labs device data sheet (FLSCL = 0x86 when using the default 2 MHz internal oscillator). 3. Set PSWE and PSEE to ‘1’s by writing PSCTL = 0x03. 4. Write any value to any byte within the page to be erased. 5. Set PSEE to ‘0’ if no further erases are necessary. 6. Restore interrupts if originally enabled.

Writing a FLASH Byte
The following procedure is used to write a byte to FLASH: 1. Disable interrupts.

Rev. 2.1

5

AN129 Software Example for the ‘F30x Series
//----------------------------------------------------------------------------// FLASH_F30x.c //----------------------------------------------------------------------------// Copyright 2002 Cygnal Integrated Products, Inc. // // AUTH: BW / FB // DATE: 20 MAY 02 // // This program shows an example of how to read, erase, and write FLASH // memory on an ‘F30x device from application code. // // Target: C8051F30x // Tool chain: KEIL C51 6.03 / KEIL EVAL C51 // //----------------------------------------------------------------------------// Includes //----------------------------------------------------------------------------#include <C8051F300.h> // SFR declarations

//----------------------------------------------------------------------------// 16-bit SFR Definitions for ‘F30x //----------------------------------------------------------------------------sfr16 sfr16 sfr16 sfr16 sfr16 sfr16 sfr16 DP TMR2RL TMR2 PCA0CP1 PCA0CP2 PCA0 PCA0CP0 = = = = = = = 0x82; 0xca; 0xcc; 0xe9; 0xeb; 0xf9; 0xfb; // // // // // // // data pointer Timer2 reload value Timer2 counter PCA0 Module 1 Capture/Compare PCA0 Module 2 Capture/Compare PCA0 counter PCA0 Module 0 Capture/Compare

//----------------------------------------------------------------------------// MAIN Routine //----------------------------------------------------------------------------void main (void) { unsigned char xdata *pwrite;

unsigned char code *pread; char EA_save;

// // // //

pointer to FLASH used for writes NOTE: this pointer must be located in <data> or <idata> space! pointer to FLASH used for reads

// saves the current state of the // interrupt enable bit.

// test string unsigned char code test_string[] = “Howdy!”; RSTSRC |= 0x02; // Disable Watchdog timer PCA0MD &= ~0x40; // enable the VDD monitor

// WDTE = 0 (clear watchdog timer // enable)

// erase the FLASH page at 0x1000 EA_save = EA;

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AN129
EA = 0; // disable interrupts (precautionary) // initialize write/erase pointer pwrite = (unsigned char xdata *) 0x1000; PSCTL = 0x03; // MOVX writes erase FLASH page FLKEY = 0xA5; FLKEY = 0xF1; *pwrite = 0; PSCTL = 0; EA = EA_save; // FLASH lock and key sequence 1 // FLASH lock and key sequence 2 // initiate page erase // MOVX writes target XRAM // re-enable interrupts

// copy a string to FLASH memory at address 0x1000 // initialize FLASH read pointer pread = (unsigned char code *) test_string; EA_save = EA; EA = 0; pwrite = 0x1000; PSCTL = 0x01; while (*pread != ‘\0’) { FLKEY = 0xA5; FLKEY = 0xF1; *pwrite = *pread; pread++; pwrite++; } FLKEY = 0xA5; FLKEY = 0xF1; *pwrite = ‘\0’; PSCTL = 0x00; EA = EA_save; while (1) { } } // FLASH lock and key sequence 1 // FLASH lock and key sequence 2 // NULL-terminate string // MOVX writes target XRAM // re-enable interrupts // spin forever

// disable interrupts (precautionary) // initialize FLASH write pointer // MOVX writes target FLASH memory // copy until NULL is detected // FLASH lock and key sequence 1 // FLASH lock and key sequence 2 // copy byte // advance pointers

Rev. 2.1

7

AN129 Software Example for the ‘F02x Series
//----------------------------------------------------------------------------// FLASH_F020.c //----------------------------------------------------------------------------// Copyright 2002 Cygnal Integrated Products, Inc. // // AUTH: BW / FB // DATE: 3 JUNE 02 // // This program shows an example of how to read, erase, and write FLASH // memory on an ‘F02x device from application code. // // Target: C8051F02x // Tool chain: KEIL C51 6.03 / KEIL EVAL C51 // //----------------------------------------------------------------------------// Includes //----------------------------------------------------------------------------#include <C8051F020.h> // SFR declarations

//----------------------------------------------------------------------------// 16-bit SFR Definitions for ‘F02x //----------------------------------------------------------------------------sfr16 sfr16 sfr16 sfr16 sfr16 sfr16 sfr16 sfr16 sfr16 sfr16 sfr16 sfr16 DP TMR3RL TMR3 ADC0 ADC0GT ADC0LT RCAP2 T2 RCAP4 T4 DAC0 DAC1 = = = = = = = = = = = = 0x82; 0x92; 0x94; 0xbe; 0xc4; 0xc6; 0xca; 0xcc; 0xe4; 0xf4; 0xd2; 0xd5; // // // // // // // // // // // // data pointer Timer3 reload value Timer3 counter ADC0 data ADC0 greater than window ADC0 less than window Timer2 capture/reload Timer2 Timer4 capture/reload Timer4 DAC0 data DAC1 data

//----------------------------------------------------------------------------// MAIN Routine //----------------------------------------------------------------------------void main (void) { unsigned char xdata * idata pwrite; // pointer to FLASH used for writes // NOTE: this pointer must be located // in <data> or <idata> space! unsigned char code *pread; char EA_save; // pointer to FLASH used for reads // saves the current state of the // interrupt enable bit.

// test string stored in FLASH unsigned char code test_string[] = “Howdy!”; // disable watchdog timer

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AN129
WDTCN = 0xde; WDTCN = 0xad; // PART A -- erase the FLASH page at 0x1000 // initialize write/erase pointer pwrite = (unsigned char xdata *) 0x1000; EA_save = EA; EA = 0; FLSCL |= 0x01; // save interrupt status // disable interrupts (precautionary) // enable FLASH writes/erases from // user software // MOVX writes erase FLASH page // initiate page erase // MOVX writes target XRAM // disable FLASH writes/erases from // user software // re-enable interrupts

PSCTL = 0x03; *pwrite = 0; PSCTL = 0; FLSCL &= ~0x01;

EA = EA_save;

// PART B -- copy test string to FLASH memory at address 0x1000 // initialize FLASH read pointer pread = (unsigned char code *) test_string; EA_save = EA; EA = 0; pwrite = 0x1000; FLSCL |= 0x01; // save interrupt status // disable interrupts (precautionary) // initialize FLASH write pointer // enable FLASH writes/erases from // user software // MOVX writes target FLASH memory // copy until NULL is detected // copy byte // advance pointers

PSCTL = 0x01; while (*pread != ‘\0’) { *pwrite = *pread; pread++; pwrite++; } *pwrite = ‘\0’; PSCTL = 0x00; FLSCL &= ~0x01;

// NULL-terminate string // MOVX writes target XRAM // disable FLASH writes/erases from // user software // re-enable interrupts

EA = EA_save;

// PART C -- erase the scratchpad area of FLASH // initialize write/erase pointer to any location in the scratchpad

Rev. 2.1

9

AN129
pwrite = (unsigned char xdata *) 0x0000; EA_save = EA; EA = 0; FLSCL |= 0x01; // save interrupt status // disable interrupts (precautionary) // enable FLASH writes/erases from // user software // // // // MOVX writes erase FLASH page (SFLE set directing FLASH reads/writes/erases to the scratchpad memory)

PSCTL = 0x07;

*pwrite = 0; PSCTL = 0;

// initiate page erase // MOVX writes target XRAM // (SFLE is cleared) // disable FLASH writes/erases from // user software // re-enable interrupts

FLSCL &= ~0x01;

EA = EA_save;

// PART D -- copy test string to the scratchpad page in FLASH // initialize FLASH read pointer pread = (unsigned char code *) test_string; // initialize FLASH write pointer to the beginning of the scratchpad pwrite = 0x0000; EA_save = EA; EA = 0; FLSCL |= 0x01; // save interrupt status // disable interrupts (precautionary) // enable FLASH writes/erases from // user software // MOVX writes target FLASH memory // copy until NULL is detected // set SFLE // copy byte // clear SFLE // advance pointers

PSCTL = 0x01; while (*pread != ‘\0’) { PSCTL |= 0x04; *pwrite = *pread; PSCTL &= ~0x04; pread++; pwrite++; } PSCTL |= 0x04; *pwrite = ‘\0’; PSCTL &= ~0x04;

// set SFLE // NULL-terminate string // clear SFLE

PSCTL = 0x00;

// MOVX writes target XRAM

FLSCL &= ~0x01;

// disable FLASH writes/erases from // user software

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AN129
EA = EA_save; // re-enable interrupts

while (1); }

// spin forever

Rev. 2.1

11

AN129 Software Example for the ‘F00x, ‘F01x, and ‘F20x Series
//----------------------------------------------------------------------------// FLASH_F000.c //----------------------------------------------------------------------------// Copyright 2002 Cygnal Integrated Products, Inc. // // AUTH: BW / FB // DATE: 20 MAY 02 // // This program shows an example of how to read, erase, and write FLASH // memory on an ‘F00x/’F01x/’F2xx device from application code. // // Target: C8051F00x/’F01x/’F2xx // Tool chain: KEIL C51 6.03 / KEIL EVAL C51 // //----------------------------------------------------------------------------// Includes //----------------------------------------------------------------------------#include <C8051F000.h> //#include <C8051F200.h> // SFR declarations // SFR declarations

//----------------------------------------------------------------------------// MAIN Routine //----------------------------------------------------------------------------void main (void) { unsigned char xdata * idata pwrite;

unsigned char code *pread; char EA_save;

// pointer to FLASH used for writes // NOTE: this pointer must be located // in <data> or <idata> space! // pointer to FLASH used for reads // saves the current state of the // interrupt enable bit.

// test string unsigned char code test_string[] = “Howdy!”; // disable watchdog timer WDTCN = 0xde; WDTCN = 0xad; // erase the FLASH page at 0x1000 EA_save = EA; EA = 0;

// disable interrupts (precautionary)

// initialize write/erase pointer pwrite = (unsigned char xdata *) 0x1000; FLSCL = 0x86; PSCTL = 0x03; *pwrite = 0; PSCTL = 0; EA = EA_save; // set FLASH scale register for // 2MHz sytem clock // MOVX writes erase FLASH page // initiate page erase // MOVX writes target XRAM // re-enable interrupts

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Rev. 2.1

AN129
// copy a string to FLASH memory at address 0x1000 // initialize FLASH read pointer pread = (unsigned char code *) test_string; EA_save = EA; EA = 0; pwrite = 0x1000; PSCTL = 0x01; while (*pread != ‘\0’) { *pwrite = *pread; pread++; pwrite++; } *pwrite = ‘\0’; PSCTL = 0x00; FLSCL = 0x0F; // NULL-terminate string // MOVX writes target XRAM // disable FLASH writes/erases

// disable interrupts (precautionary) // initialize FLASH write pointer // MOVX writes target FLASH memory // copy until NULL is detected // copy byte // advance pointers

EA = EA_save; while (1) { } }

// re-enable interrupts // spin forever

Rev. 2.1

13

AN129
Contact Information
Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: productinfo@silabs.com Internet: www.silabs.com

The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.

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