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FE1.1 Data Sheet (Rev. 1.11)


USB 2.0 4-Port Hub Data Sheet Rev. 1.11

FE1.1 USB 2.0 HIGH SPEED 4-PORT HUB CONTROLLER
_______________________DATA SHEET_______________________
INTRODUCTION
The FE1.

1 is a highly integrated, high quality, high performance, low power consumption, yet low cost solution for USB 2.0 High Speed 4-Port Hub. It adopts Multiple Transaction Translator (MTT) architecture to explore the maximum possible throughput. Six, instead of two, non-periodic transaction buffers are used to minimize potential traffic jamming. The whole design is based on state-machine-control to reduce the response delay time; no micro controller is used in this chip. To guarantee high quality, the whole chip is covered by Test Scan Chain – even on the high speed (480MHz) modules, so that all the logic components could be fully tested before shipping. Special Build-In-Self-Test mode is designed to exercise all high, full, and low speed Analog Front End (AFE) components on the packaging and testing stages as well. Low power consumption is achieved by using 0.18μm technology and comprehensive power/clock control mechanism. Most part of the chip will not be clocked unless needed.

FEATURES
? Fully compliant with Universal Serial Bus Specification Revision 2.0 (USB 2.0); □ Upstream facing port supports HighSpeed (480MHz) and Full-Speed (12MHz) modes; □ 4 downstream facing ports support High-Speed (480MHz), Full-Speed (12MHz), and Low-Speed (1.5MHz) modes; Integrated USB 2.0 Transceivers; Integrated upstream 1.5KΩ pull-up, downstream 15KΩ pull-down, and serial resisters; Integrated 5V to 3.3V and 1.8V regulator. Integrated Power-On-Reset circuit; Integrated 12MHz Oscillator with feedback resister, and crystal load capacitance; Integrated 12MHz-to-480MHz Phase Lock Loop (PLL); Multiple Transaction Translators (MTT) – □ One TT for each downstream port; □ Alternate Interface 0 for Single-TT, and Alternate Interface 1 for Multiple-TT; □ Each TT could handle 64 periodic Start-Split transactions, 32 periodic Complete-Split transactions, and 6
1

? ?

? ? ? ? ?

Feb. 9, 2009

Subject to Change Without Notice

USB 2.0 4-Port Hub Data Sheet Rev. 1.11

?

?

?

none-periodic transactions; Automatic self-power status monitoring; □ Automatic re-enumeration when SelfPowered switching to Bus-Powered; Board configured options – □ Ganged or Individual Power Control Mode select; □ Global or Individual Over-Current Detection Mode select; □ Removable or Non-Removable Downstream Devices configuration; Comprehensive Port Indicators support: □ Standard downstream port status indicators (Green and Amber LED control for each downstream port); □ Hub active LED support;

Feb. 9, 2009

Subject to Change Without Notice

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USB 2.0 4-Port Hub Data Sheet Rev. 1.11

BLOCK DIAGRAM
To Downstream Devices To Upstream Host/Hub

Downstream PHY #1

Downstream PHY #2

Downstream PHY #3

Downstream PHY #4

Upstream PHY

Routing Switch

USB Multi-port Transceiver Macro Cell
12M Hz Crystal 3.3V & 1.8V Regulator OSC Over Current Detection Power Switch Control POR PLL (x40) Data Transmit Data Recovery & Elastic Buffer Upstream Port Controller

Downstream Port Controllers

USB 2.0 Hub Controlle r

SIE

Transaction Translators Full/Low-Speed Handler

Transaction Translator High-Speed Handler

Hub Controller

Hub Activity LED

Unified Transaction Translator Buffer (8KB)

LED Controller

Port Indicators

Fig. 1: Block Diagram

Feb. 9, 2009

Subject to Change Without Notice

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USB 2.0 4-Port Hub Data Sheet Rev. 1.11

PACKAGE I – 48-PIN LQFP
(Body Size: 7x7 mm)

PIN ASSIGNMENT
VD33_OUT DIS_REG
37 36

PWRB[1]

OVCB[1]

48

OVCB[2] PWRB[2] VD18 PWRB[3] OVCB[3] VSS OVCB[4] PWRB[4] VD_PLL VS_PLL XOUT XIN

VD5_IN

LED[2]

LED[1]

LED[4]

LED[3]

TEST

VD33

DRV

1

BUS_B VBUSM XRSTJ VSS VD33 DPU DMU VD18 REXT VD3_IN VREG18 VS_A

FE1.1

12 13 24

25

DM4

DM3

DM2

DP3 VD33

VD33

DM1

DP4

DP2

VSS

Fig. 2: 48-pin LQFP Pin Assignment

Feb. 9, 2009

Subject to Change Without Notice

VSS

DP1

4

USB 2.0 4-Port Hub Data Sheet Rev. 1.11

PACKAGE II – 48-PIN QFN
(Body Size: 6x6 mm, 0.4pitch)

PIN ASSIGNMENT

VD33_OUT

48

OVCB[2] PWRB[2] VD18 PWRB[3] OVCB[3] VSS OVCB[4] PWRB[4] VD_PLL VS_PLL XOUT XIN

DIS_REG
37 36

PWRB[1]

OVCB[1]

VD5_IN

LED[4]

LED[3]

LED[2]

LED[1]

TEST

VD33

DRV

1

BUS_B VBUSM XRSTJ VSS VD33

FE1.1

DPU DMU VD18 REXT VD3_IN VREG18

12 13 24

25

VS_A

VSS

VD33

DM3

DM2

DM4

VSS

DP4

DP3

DM1

DP2

VD33

Fig. 3: 48-pin QFN Pin Assignment

Feb. 9, 2009

Subject to Change Without Notice

DP1

5

USB 2.0 4-Port Hub Data Sheet Rev. 1.11

PIN DESCRIPTION TABLE
Pin Name
OVCB[4:1]

Pin No.
48

Type

Function

Note

7, 5, 1, I

Over Current Indicators, active low, for each corresponding downstream 1 facing port. When Global Over-Current Protection mode being selected with PWRB[4] tied to ground, only OVCB[1] is used, and all the other pins should be tied to ground.

PWRB[3:1]

4, 2, 47

O

Downstream Device Power Enable, active low, for each corresponding downstream device. When Ganged Power Switching mode being selected, with PWRB[4] tied to ground, only PWRB[1] is used.

1

PWRB[4]

8

I/O

When this pin been tied to ground, the Global Over-Current Protection and Ganged Power Control mode is selected. In this mode, only OCVB[1] and PWRB[1] are effective. Otherwise, it is Downstream Device Power Enable, active low, for the 4th downstream facing port.

1

VD_PLL VS_PLL XOUT XIN VD33 DM4 DP4 VSS DM3 DP3 DM2 DP2 DM1 DP1 VS_A VREG18 VD3_IN

9 10 11 12 32, 41 14 15 6, 16, 22, 33 17 18 20 21 23 24 25 26 27

P P OSC OSC

1.8V power for PLL. Ground for PLL. 12 MHz Crystal Oscillator output 12 MHz Crystal Oscillator input. 3.3V Power The D- pin for the 4th Downstream Facing Port. The D+ pin for the 4th Downstream Facing Port. Ground The D- pin of the 3rd Downstream Facing Port. The D+ pin of the 3rd Downstream Facing Port. The D- pin of the 2nd Downstream Facing Port. The D+ pin of the 2nd Downstream Facing Port. The D- pin of the 1st Downstream Facing Port. The D+ pin of the 1st Downstream Facing Port. Analog Ground. 1.8V power output from integrated 3.3V→1.8V regulator – a 10μF decoupling capacitor is required. 3.3V power input for 3.3V→1.8V integrated regulator.

13, 19, P UT UT P UT UT UT UT UT UT P P P

Feb. 9, 2009

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6

USB 2.0 4-Port Hub Data Sheet Rev. 1.11

REXT VD18 DMU DPU XRSTJ

28 3, 29 30 31 34 P UT UT I

A 2.7K? (± 1%) resister should be connected to VS_A to provide internal bias reference. 1.8V Power The D- pin of the Upstream Facing Port. The D+ pin of the Upstream Facing Port. External Reset, active low, is an optional source of chip reset signal, beside the build-in Power-On-Reset. The minimum low pulse width is 10 μs.

VBUSM BUS_B DIS_REG VD5_IN VD33_OUT TEST DRV

35 36 37 38 39 40 42

I I I P P I I/O

The VBUS Monitor of upstream facing port. Bus power indicator, active low, when no local power presented. Disable internal 5V→3.3V regulator. 5V power input for integrated 5V→3.3V regulator. 3.3V power output from integrated 5V→3.3V regulator – a 10μF decoupling capacitor is required. Test Mode Enable should be tied to ground for normal operation. LED Drive Control – when tied to ground, the support of PORT_INDICATOR (LED) is disabled; otherwise, together with LED[4:1], it controls the illumination of LED's. 2

LED[4:1]

46, 45, I/O 44, 43

Port Indicator (LED) Control – one pin for each downstream port. If tied to ground, it indicates the device attached to the corresponding port is a Non-Removable device and no LED is supported. If connected to the Green LED and Amber LED, it controls their illumination according to the Hub Class Specification.

2

Type Abbreviation – I : Input; O : Output; I/O : Input/Output; P : Power/Ground; UT: USB Transceiver. Note 1 – Power Control Switch And Over-Current Protection Configuration Both the power control mode and over-current protection mode are configured by the PWRB[4] pin. To select Ganged Power Control Mode and Global Over-Current Protection Mode, the PWRB[4] should be tied to ground, as shown on the left part of Fig. 4. In this case, the over-current indicator is sampled by OVCB[1] and the power switch for downstream ports is controlled by PWRB[1]. The rest of the OVCB, 4 to 2, must be tied to ground and the PWRB, 3 and 2, left unconnected. The power switch of
Feb. 9, 2009 Subject to Change Without Notice 7

USB 2.0 4-Port Hub Data Sheet Rev. 1.11

the left part of Fig. 4 is not really necessary, unless power-off downstream devices during hub reset is required. It is only placed here to demonstrate how the PWRB[1] works in this mode.
Poly meric PTC 2A

5V Source OVCB[1] OVCB[2] OVCB[3] OVCB[4] FE1.1 PWRB[1] PWRB[2] PWRB[3] PWRB[4]

3.3V

5V

OVCB[1] OVCB[2] OVCB[3] OVCB[4] FE1.1 To VBUS of all downstream facing ports Global Over-Current Protection & Ganged Power Control Selected PWRB[1] PWRB[2] PWRB[3] PWRB[4]

ENA MIC2026-2 OUTA IN FLGA FLGB GND OUTB ENB

To VBUS of Port 1 To VBUS of Port 2 To VBUS of Port 3 To VBUS of Port 4

ENA MIC2026-2 OUTA IN FLGA FLGB GND OUTB ENB

Fig. 4: Power Control & Over-Current Protection Configuration For more delicate power management of downstream devices, the Individual Power Control Mode and Individual Over-Current Protection Mode could be implemented. As depicted by the right part of Fig. 4, two Dual-Channel Power Distribution Switch with current sensing and limiting capability are used. In this configuration, the FE1.1 will automatic recognize that the Individual mode is selected and report to the host as such in the Hub Descriptor Table.

Note 2 – LED Configuration The supporting of Port Indicators – one Green LED and one Amber LED for each downstream port, is optional and could be configured by the DRV pin. If LED is not required, the DRV should be tied to ground to disable this option, as shown in the left part of the following fig. 5. The LED[n] pins could be either left unconnected to denote removable downstream devices, or tied to ground to identify that the corresponding port is attached by a non-removable device, as shown by port 4. To fully support PORT_INDICATOR as USB Specification Rev. 2.0 defined, the LED's should be connected as the right part of the fig. 5. It is important that the direction of all the LED's must be connected as shown. Otherwise, the Green/Amber light would not function as defined by the USB 2.0 specifications. The maximum load current of each LED is 3mA. The LED[n] pin could also be tied to
Feb. 9, 2009 Subject to Change Without Notice 8

USB 2.0 4-Port Hub Data Sheet Rev. 1.11

ground to indicate that the device attached to port n is a non-removable device. If this be case, no LED could be connected to that pin – as demonstrated by port 4. An optional Hub Active LED could be implemented between DRV pin and ground. This light would go on whenever the hub is configured by the host driver, or wake-up from suspend mode. It will go off whenever the hub switch into suspend mode or un-configured by the host. The LED[1] of the right part of fig. 4 demonstrate that the LED could be omitted without affecting the normal function. That is, the host would still identify this hub as supporting port indicators, the Hub Active LED would illuminate as normal, and the port 1 would not be considered as non-removable.

LED[1] Port 1, 2, and 3: Removable Device, No Port Indicator supported.

LED[1]

Port 1 is Removable, but no LED implemented.
Green

LED[2] FE1.1 LED[3]

LED[2]
Amber

Port 2 Indicators
Green

FE1.1 LED[3]
Amber

Port 3 Indicators

LED[4]

Port 4 Device is Non-Removable

LED[4]

Port 4 Device is Non-Removable

DRV

No Port Indicator supported.

DRV
Green

Hub Active Indicator (optional)

Fig. 5: Port Indicators And Removable Device Configurations

Feb. 9, 2009

Subject to Change Without Notice

9

USB 2.0 4-Port Hub Data Sheet Rev. 1.11

ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Parameter Storage Temperature Power Supply Voltage TS
VD5_IN VD33 & VD3_IN VD18 & VD_PLL

Symbol

Min. -55 -0.5 -0.5 -0.5 -2000 -200 -200

Max. +150 +6.0 +4.0 +2.5 2000 200 200 ℃ V

Unit

ESD Human Body Mode ESD Machine Mode Latch Up

V V mA

RECOMMENDED OPERATING RANGES
Parameter Operating temperature Operating voltage TA
VD5_IN VD33 & VD3_IN VD18 & VD_PLL

Symbol 0

Min. 4.5 3.0 1.62 -0.3 2.0 1.45 1.44 0.89 2.4

Typ. 5.0 3.3 1.8

Max. 70 5.5 3.6 1.98 0.8 5.5 V

Unit ℃

LOW level voltage of digital input HIGH level voltage of digital input Threshold voltage of digital input Low-to-High level of schmitt-trigger input High-to-Low level of schmitt-trigger input LOW level voltage of digital output@4mA HIGH level voltage of digital output@4mA

VIL VIH VTH VT+ VTVOL VOH

V V V V V V V

1.58 1.5 0.94

1.74 1.56 0.99 0.4

Feb. 9, 2009

Subject to Change Without Notice

10

USB 2.0 4-Port Hub Data Sheet Rev. 1.11

POWER CONSUMPTION
DC SUPPLY CURRENT Symbol
Active ports I_suspend 4

Condition Host Suspend Full-Speed High-Speed High-Speed 3 Full-Speed High-Speed High-Speed Full-Speed 2 High-Speed High-Speed Full-Speed 1 High-Speed High-Speed Full-Speed No active High-Speed 4x Full-Speed 4x High-Speed 4x Full-Speed 3x Full-Speed 3x High-Speed 3x Full-Speed 2x Full-Speed 2x High-Speed 2x Full-Speed 1x Full-Speed 1x High-Speed 1x Full-Speed Device

Typ. 500 30 115 47 30 98 47 30 81 47 30 64 47 30 47

Unit uA mA mA mA mA mA mA mA mA mA mA mA mA mA mA

Icc

Note: The power consumption is measured when the bus is in IDLE state – there is no activities other than the Start-Of-Frame (SOF) and INTERRUPT-IN packets for the hub itself on the bus. The peak power consumption varies depending upon the system configuration, type of operations, and over-all bus utilization.

Feb. 9, 2009

Subject to Change Without Notice

11

USB 2.0 4-Port Hub Data Sheet Rev. 1.11

PACKAGE DRAWING I – 48-PIN LQFP

Feb. 9, 2009

Subject to Change Without Notice

12

USB 2.0 4-Port Hub Data Sheet Rev. 1.11

PACKAGE DRAWING II – 48-PIN QFN

TERMINUS TECHNOLOGY INC. 1052, 10F, NO. 3-2, YUANQU ST. NANGANG TAIPEI, TAIWAN, ROC
Feb. 9, 2009 Subject to Change Without Notice 13


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