Ethernet NanoBoard Add-On
第一部分 原理图目录树 1 PHY.SchDoc
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PHY.PcbDoc
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第一部分 1
原理图
PHY.SchDoc
This Reference Design has been setup to illustrate the use of SVN DBLib in Altium Designer.
Setting up the system for SVN Subversion
Version Control System are tools to manage file revisions and Subversion needs to be installed prior to use SVN Database Libraries. Compiled packages of Subversion can be found freely over the internet http://subversion.tigris.org . When Subversion is installed, the version control feature in Altium Designer needs to be enabled by selecting the SVN - Subversion option and clicking the Auto Detect Subversion button in the Version Control ?General page of the Preferences dialog (DXP ?Preferences). Additional options are available in the Version Control ?SVN Libraries page of the Preferences dialog. A working folder for checked out files can be defined and the interval of repository cache files can be set.
Installing and Editing SVN DBLib
All SVN DBLib settings are centralised in one SVN DBLib file and configurable through the SVN Database Library editor by opening the SVNDBLib file - Linking parts parameters and database fields, and setting Symbols and Footprints folders can be done in this editor.
Setting up the system for SVN Subversion
The parts on this schematic have been linked to a SVN Database Library located in the Examples\Reference Designs\SVN DBLib directory of this installation. In this example, a Microsoft Access database has been used to create the library components and a SVN repository has been created to store and keep control of the files revisions. While the Symbols and Footprints are stored in a repository, it is possible to check out the Schematic and PCB libraries directly from the Libraries panel for editing - Selecting the Edit Symbol and Edit Footprint commands when right mouse clicking a component or a Footprint model will check out the corresponding library file into a working directory. The SVN DBLib working directory is set in the Version Control ?SVN Libraries page of the Preferences dialog (DXP ?Preferences).
Like other libraries types, SVN DBLib can be added to the Libraries Panel by clicking the Libraries button in this panel and installing SVNDBLib files in the Installed page of the Available Libraries dialog. Install the Examples\Reference Designs\SVN DBLib\Altium Design Library.SVNDbLib library.
When a Libraries are edited, the history and revisions of the files are displayed in the Storage Manager panel. Files can be committed and revisions can be physically compared using the right mouse click commands in this panel.
Ethernet nanoboard add-on
PWFBOUT L1 3V3 MDC CRS RXD0 RXD2 RXC TXD0 TXD2 TXEN RESETB JP1 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 MDIO RXER RXDV RXD1 RXD3 TXC TXD1 TXD3 COL MDC MDIO TXD0 TXD1 TXD2 TXD3 TXEN TXC RXDV RXD0 RXD1 RXD2 RXD3 RXC COL CRS RXER 25 26 6 5 4 3 2 7 22 21 20 19 18 16 1 23 24 46 47 2 LED0 LED1 LED2 LED3 LED4 PWFBIN 3V3 3V3 GND GND GND 9 10 12 13 15 8 14 48 11 17 45 U1 MDC MDIO TXD0 TXD1 TXD2 TXD3 TXEN TXC RXDV RXD0 RXD1 RXD2 RXD3 RXC COL CRS RXER X1 X2 LED0/AD0 LED1/AD1 LED2/PHYAD2 LED3/PHYAD3 LED4/PHYAD4 PWFBIN DVDD33 DVDD33 DGND DGND DGND RTL8201CL R17 R18 5K1 5% DS3 RED R20 510R 5% R21 R22 5K1 5% DS5 RED GND R24 510R 5% GND LED4 LED3 R23 510R 5% 5K1 5% DS4 RED LED2 LED1 R19 510R 5% 5K1 5% DS2 RED TPTX+ RTSET ISOLATE RPTR SPEED DUPLEX ANE LDPS MII/SNIB RESETB 34 28 43 40 39 38 37 41 44 42 R5 50R 1% R14 2K 1% C10 100nF 50V GND GND R6 50R 1% PWFBOUT AVDD33 AGND AGND NC TPRX32 36 29 35 27 30 3V3A GND GND C1 22uF 10V C3 100nF 50V
PWFBIN 30R@100MHz 600mA
C4 100nF 50V
GND C5 GND 100nF 50V R2 50R 1% R3 50R 1% T1 8 7
3V3
C6 100nF 50V
R1 0R 5%
PWFBOUT RXCT RX+ TXCT TX+ 9 10 11 14 15 16 R10 R11 75R 5% 75R 5% R12 R13 75R 5% 75R 5% C9 100pF 3KV 1 2 3 4 5 6 7 8
R4 5K1 5%
J1 RJ45 HEADER
2x10 HEADERGND
RDCT RD+ TDCT TD+ TS6121C R7 0R 5%
COL
TPRX+ TPTX-
31 33
6 3 2 1
RXER
CRS
1
25MHz R9 5K1 5% C7 20pF 50V GND C8 20pF 50V
R8 5K1 5% GND
PWFBOUT
GND
3V3 R15 5K1 5% R16 510R 5%
GND GND 3V3 3V3 3V3 3V3 3V3 RESETB
C11 100nF 50V GND
MH1 MH2 C12 100nF 50V GND 3V3A C14 100nF 50V L2 30R@100MHz 600mA C13 100nF 50V C15 100nF 50V GND C16 100nF 50V
Y1
DS1 RED
LED0
3V3
C2 22uF 10V
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PHY.PcbDoc
见“第二部分”
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第二部分
2 层 PCB 板设计部分
2 层 PCB 层设计_Layer Stack Manager
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Top Layer 层设计 与 Bottom Layer 层设计
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Top Layer 层设计
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Top Layer 层设计
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MH4
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6 5 4 3 2 1 MH3
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P HY
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Bottom Layer 层设计
MH2
MH4 8 7 6 20 19 5 4 18 17 3 2 16 15 1 MH3 14 13 MH1 12 11
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第三部分
Design Information 部分
如第二部分所示 无
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第四部分 略
程序及其它部分
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