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DS1302时钟芯片


DS1302 Trickle-Charge Timekeeping Chip
www.maxim-ic.com

FEATURES
Real-Time Clock Counts Seconds, Minutes, Hours, Date of the Month, Month, Day of the Week, and Year with

Leap-Year Compensation Valid Up to 2100 31 x 8 Battery-Backed General-Purpose RAM Serial I/O for Minimum Pin Count 2.0V to 5.5V Full Operation Uses Less than 300nA at 2.0V Single-Byte or Multiple-Byte (Burst Mode) Data Transfer for Read or Write of Clock or RAM Data 8-Pin DIP or Optional 8-Pin SO for Surface Mount Simple 3-Wire Interface TTL-Compatible (VCC = 5V) Optional Industrial Temperature Range: -40°C to +85° C DS1202 Compatible Underwriters Laboratories (UL?) Recognized

PIN CONFIGURATIONS
TOP VIEW VCC2 X1 X2 GND 1 8 VCC1 SCLK I/O CE

3 4

DS1302

2

7 6 5

DIP (300mils)

VCC2 X1 X2 GND

1 2 DS1302 3 4

8 7 6 5

VCC1 SCLK I/O CE

SO (208 mils/150 mils)

ORDERING INFORMATION
PART DS1302+ DS1302N+ DS1302S+ DS1302SN+ DS1302Z+ DS1302ZN+
+Denotes a lead-free/RoHS-compliant package. *An N anywhere on the top mark indicates an industrial temperature grade device. A + anywhere on the top mark indicates a lead-free device.

TEMP RANGE 0° to +70° C C -40° to +85° C C 0° to +70° C C -40° to +85° C C 0° to +70° C C -40° to +85° C C

PIN-PACKAGE 8 PDIP (300 mils) 8 PDIP (300 mils) 8 SO (208 mils) 8 SO (208 mils) 8 SO (150 mils) 8 SO (150 mils)

TOP MARK* DS1302 DS1302 DS1302S DS1302S DS1302Z DS1302ZN

UL is a registered trademark of Underwriters Laboratories, Inc.

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REV: 120208

DS1302 Trickle-Charge Timekeeping Chip

DETAILED DESCRIPTION
The DS1302 trickle-charge timekeeping chip contains a real-time clock/calendar and 31 bytes of static RAM. It communicates with a microprocessor via a simple serial interface. The real-time clock/calendar provides seconds, minutes, hours, day, date, month, and year information. The end of the month date is automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour format with an AM/PM indicator. Interfacing the DS1302 with a microprocessor is simplified by using synchronous serial communication. Only three wires are required to communicate with the clock/RAM: CE, I/O (data line), and SCLK (serial clock). Data can be transferred to and from the clock/RAM 1 byte at a time or in a burst of up to 31 bytes. The DS1302 is designed to operate on very low power and retain data and clock information on less than 1?W. The DS1302 is the successor to the DS1202. In addition to the basic timekeeping functions of the DS1202, the DS1302 has the additional features of dual power pins for primary and backup power supplies, programmable trickle charger for VCC1, and seven additional bytes of scratchpad memory.

OPERATION
Figure 1 shows the main elements of the serial timekeeper: shift register, control logic, oscillator, real-time clock, and RAM.

TYPICAL OPERATING CIRCUIT
VCC

X1 CE CPU I/O SCLK GND

X2 VCC2 VCC

DS1302
VCC1

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DS1302 Trickle-Charge Timekeeping Chip

Figure 1. Block Diagram
X2 X1

vCC1 vCC2
GND

POWER CONTROL

DS1302
CL CL

CE

1Hz REAL TIME CLOCK 31 X 8 RAM

I/O

INPUT SHIFT REGISTERS

COMMAND AND CONTROL LOGIC

SCLK

TYPICAL OPERATING CHARACTERISTICS
(VCC = 3.3V, TA = +25° unless otherwise noted.) C,
ICC1T vs. VCC1T
400 30

ICC2T vs. VCC2T

350

25

300 SUPPLY CURRENT (nA) SUPPLY CURRENT (uA) 2.0 3.0 4.0 5.0 20

250

15

200

150

10

100 VCC1 (V)

5 2.0 3.0 VCC2 (V) 4.0 5.0

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DS1302 Trickle-Charge Timekeeping Chip

PIN DESCRIPTION
PIN NAME FUNCTION Primary Power-Supply Pin in Dual Supply Configuration. VCC1 is connected to a backup source to maintain the time and date in the absence of primary power. The DS1302 operates from the larger of VCC1 or VCC2. When VCC2 is greater than VCC1 + 0.2V, VCC2 powers the DS1302. When VCC2 is less than VCC1, VCC1 powers the DS1302. Connections for Standard 32.768kHz Quartz Crystal. The internal oscillator is designed for operation with a crystal having a specified load capacitance of 6pF. For more information on crystal selection and crystal layout considerations, refer to Application Note 58: Crystal Considerations for Dallas Real-Time Clocks. The DS1302 can also be driven by an external 32.768kHz oscillator. In this configuration, the X1 pin is connected to the external oscillator signal and the X2 pin is floated. Ground Input. CE signal must be asserted high during a read or a write. This pin has an internal 40k∧ (typ) pulldown resistor to ground. Note: Previous data sheet revisions referred to CE as RST. The functionality of the pin has not changed. Input/Push-Pull Output. The I/O pin is the bidirectional data pin for the 3-wire interface. This pin has an internal 40k∧ (typ) pulldown resistor to ground. Input. SCLK is used to synchronize data movement on the serial interface. This pin has an internal 40k∧ (typ) pulldown resistor to ground. Low-Power Operation in Single Supply and Battery-Operated Systems and LowPower Battery Backup. In systems using the trickle charger, the rechargeable energy source is connected to this pin. UL recognized to ensure against reverse charging current when used with a lithium battery. Go to www.maximic.com/TechSupport/QA/ntrl.htm.

1

VCC2

2

X1

3

X2

4 5

GND CE

6 7

I/O SCLK

8

VCC1

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DS1302 Trickle-Charge Timekeeping Chip

OSCILLATOR CIRCUIT
The DS1302 uses an external 32.768kHz crystal. The oscillator circuit does not require any external resistors or capacitors to operate. Table 1 specifies several crystal parameters for the external crystal. Figure 1 shows a functional schematic of the oscillator circuit. If using a crystal with the specified characteristics, the startup time is usually less than one second.

CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was trimmed. Additional error will be added by crystal frequency drift caused by temperature shifts. External circuit noise coupled into the oscillator circuit may result in the clock running fast. Figure 2 shows a typical PC board layout for isolating the crystal and oscillator from noise. Refer to Application Note 58: Crystal Considerations for Dallas Real-Time Clocks for detailed information.

Table 1. Crystal Specifications*
PARAMETER Nominal Frequency Series Resistance Load Capacitance SYMBOL fO ESR CL 6 MIN TYP 32.768 45 MAX UNITS kHz k∧ pF

*The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to Application Note 58: Crystal Considerations for Dallas Real-Time Clocks for additional specifications.

Figure 2. Typical PC Board Layout for Crystal
LOCAL GROUND PLANE (LAYER 2)

X1 CRYSTAL X2
NOTE: AVOID ROUTING SIGNALS IN THE CROSSHATCHED AREA (UPPER LEFTHAND QUADRANT) OF THE PACKAGE UNLESS THERE IS A GROUND PLANE BETWEEN THE SIGNAL LINE AND THE PACKAGE.

GND

COMMAND BYTE
Figure 3 shows the command byte. A command byte initiates each data transfer. The MSB (bit 7) must be a logic 1. If it is 0, writes to the DS1302 will be disabled. Bit 6 specifies clock/calendar data if logic 0 or RAM data if logic 1. Bits 1 to 5 specify the designated registers to be input or output, and the LSB (bit 0) specifies a write operation (input) if logic 0 or read operation (output) if logic 1. The command byte is always input starting with the LSB (bit 0).

Figure 3. Address/Command Byte

7 1

6 RAM CK

5 A4

4 A3

3 A2

2 A1

1 A0

0 RD WR

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