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A DC-DC buck converter chip with integrated PWM-PFM hybrid-mode control circuit


PEDS2009

A DC-DC Buck Converter Chip with Integrated PWM/PFM Hybrid-Mode Control Circuit
Yie-Tone Chen and Cing-Hong Chen Department of Electrical Engineering National Yunlin

University of Science and Technology Touliu, Yunlin 640, Taiwan, R.O.C. E-mail:chenyt@yuntech.edu.tw
Abstract—This paper proposes a DC-DC buck power converter chip with a novel integrated PWM/PFM hybrid-mode control. The DC-DC converter chip with synchronous rectifier not only uses current-mode feedback control but also possesses constantfrequency-mode control and hybrid-mode control functions at the same time. Furthermore, the operational modes of the converter can be selected by an external voltage signal. In the part of constant-frequency-mode control, as the inductor current is below zero, the synchronous rectifier switch of the converter will be automatically turned off in order to reduce the loss of the reverse inductor current. About the hybrid-mode control, the operational modes of the converter can be judged by the proposed PWM/PFM hybrid-mode control circuit. When the converter is operated in CCM, the constantfrequency-mode control is applied and when the inductor current is in DCM, the converter is operated under the variablefrequency-mode control. At this moment, the switching frequency of the converter is designed to decrease proportionally with the load to reduce the high switching loss at light load. The synchronous rectifier switch will also be turned off in order to reduce the reverse conduction loss. All the above functions are integrated in one chip. Simulation and experimental results verify that the converter chip works functionally. The power converter chip with PWM/PFM hybrid-mode control proposed here is very suitable for the portable electronic products with the requirements of low voltage, low power, high efficiency, and wide load range. Keywords: PWM/PFM hybrid-mode control, synchronous rectifier, constant-frequency-mode, variable-frequency-mode, power converter chip.

I. INTRODUCTION In the consumer market now, the number of portable battery-operated systems such as mobile telephone, PDA, and blue-tooth has grown explosively. The main reason is that the portable electronic product is small, light, and convenient to carry. However, the main power such as the cell-phone comes from the lithium battery, so the lithium battery should certainly offer a steady power for the cell-phone to use. But the lithium battery supply voltage is still in 12V, mainly about 5V and the operation voltage of portable electronic product keeps reducing (since past 5V, 3.3V, even now to a lower value), so it is a developing trend which an integrated DC-DC converter is needed between the battery and portable system [1,2]. In order to achieve fast transient response and high power
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density, the synchronous rectifier technology is widely used in an integrated DC-DC converter [3]. The disadvantage of this topology is its low efficiency at light load due to the higher conduction loss and gate drive loss. So the efficiency of the buck converter can be improved with disabling the negative inductor current when the converter operates at light load [3~5]. Furthermore, the Pulse-Frequency-Modulation (PFM) control can also be applied to further increase the efficiency and extend the load range of DC-DC converter [3~11]. However, the above mentioned techniques are either only partly integrated in a chip or mostly realized by the external discrete sensing circuits. The extra loss and more occupied volume caused by these external circuits are disgusted. Therefore, this paper proposes a DC-DC buck power converter chip with integrated PWM/PFM hybrid-mode control to apply for low voltage, low power, high efficiency and wide load range. Fig. 1 shows the schematic structure of the buck converter chip with integrated PWM/PFM hybrid-mode control. It has all the above functions described in abstract. Moreover, the operational modes of the converter can be selected by an external voltage control signal SYNC. When SYNC is low, no matter the inductor current is in CCM or DCM, the operation of the converter is under constantfrequency-mode control; when SYNC is high, the operation of the converter is under hybrid control and the operational modes of the converter can be automatically judged by the proposed novel PWM/PFM hybrid-mode control circuit even the operational parameters of the converter are changed. In Fig.1, it consists of about eight basic functional blocks. In addition to the basic blocks of the comparator, error amplifier, PWM control logic circuit, current sensing circuit, and driver circuit which have been discussed in the past literatures [6~9], there are other necessary blocks to realize the above mentioned PWM/PFM hybrid control functions. Here, this paper mainly proposes these novel circuits suitable to be applied to the blocks. II. DISABLING CIRCUIT OF NEGATIVE INDUCTOR CURRENT The efficiency of the buck converter with disabling negative inductor current has already been verified to be more significantly improved than that of the conventional buck converter [4,5]. As the inductor current is below zero, the

PEDS2009
VDD R S Q QB D_Q NP D_QB MP

Amplifier Vx

Comparator

Vx

Z_C NN MN

Fig. 2 Disabling circuit of negative inductor current Table I Relation of node potential

Node Operate mode
Fig. 1 A current-mode buck converter chip with integrated PWM/PFM hybrid-mode control

D_Q B 0 1 1

D_Q 1 0 0

Vx 0 0 0

Z_C 0 1 0

NP 0 1 1

NN 0 1 0

CCM DCM

synchronous rectifier switch of the converter must be turned off to increase the efficiency. However, the common current-sensing circuits in DC-DC converter chips only sense the turn-on part of the main switch. The turn-off part has not been sensed, thus the exact cross point of zero inductor current can not be built by using these methods [6~8]. Here, the zero current detecting circuit in [1] is used to sense the exact point of zero inductor current. The real control circuit for disabling the negative inductor current is shown in Fig. 2. The operational principle of this circuit is as follows. In CCM, when the main switch M P is turned on and the synchronous rectifier switch M N is turned off, current is charged to the inductor. At this moment, the voltage in V x end is positive. Whereas as the main switch M P is turned off and the synchronous rectifier switch M N is turned on, in order to maintain the original polarity the inductor current begins to discharge at the same time. At this time, the voltage in V x end is negative. But once the inductor is at light load, the synchronous rectifier switch is not turned off in time, the voltage in V x end will become positive when the inductor current enters negative [1]. The relation about the circuit in all the above situations is listed in Table I. Then, according to Table I, the synchronous rectifier switch of the converter can be seen to be automatically turned off when operating in the negative inductor current in order to reduce the loss of the reverse inductor current. . PWM/PFM HYBRID-MODE CONTROL CIRCUIT In order to realize a DC-DC converter chip with the feature of low voltage, high efficiency, and wider load range, this paper uses the PWM/PFM hybrid-mode control [3,9~11]. When the inductor current is in CCM, the converter is operated by constant-frequency-mode control. Once the inductor current is below zero, the operating mode of the
182

converter can be automatically changed from constantfrequency-mode control to variable-frequency-mode control. At this moment, the switching frequency of converter is decreased proportionally with the load to reduce the high switching loss at light load. In addition, the synchronous rectifier switch will be turned off at the same time in order to reduce the reverse conduction loss. To improve the efficiency at light load, the converter can be operated in a pulse frequency modulation mode. In the PFM mode, the converter is operated in DCM at a switching frequency that depends on the load. For dc-dc converters designed to regulate the output voltage at a constant value, there are different approaches to achieve PFM operation which include operation at constant on time t on , or constant off time t off of the main switch M P [9~11], and the PFM switching frequency f sw as a function of the output voltage variation. The relationship for constant on time and off time can be easily found as
f sw
f sw

2L (1 M ) 2 t OFF RL
2L t ON
2

(1)

RL

M2 1 M

(2)

Where the conversion ratio of buck converter M is defines as M Vo . In the constant t off approach, the switching
Vin

frequency f sw is increased with decreasing M, which is undesirable. In the constant t on approach, for low M, eq.(2) shows that the switching frequency is approximately proportional to M2. However, the peak inductor current in the constant t on approach is increased to a high value at low

PEDS2009

output voltage, which results in increased conduction losses and the output voltage ripple. As a result, this paper proposes a novel PWM/PFM hybrid-mode control circuit. The PWM/PFM hybrid-mode control circuit is used to vary the switching frequency proportionally to the load. This principle is utilizing the error signal (V ea ) of the error amplifier to vary the switching frequency of the converter. As shown in Fig. 1, when the load of converter is dropped, it will rise to the output voltage. The output voltage is scaled down to bV o and compared with the reference voltage V ref . So the output end, V ea , of the error amplifier will be decreased. Utilizing this characteristic, when V ea is reduced proportionally to the load, the discharging current of the circuit will be decreased proportionally to the load. In other words, the discharging time of the converter will become long, so the switching frequency of the converter is decreased proportionally with the load to get the function of varying frequency. After the description of the PFM principle applied in this paper, the remaining building blocks are the boundary detecting circuit and hybrid-mode control circuit. They are now discussed in the following. A. CCM/DCM BOUNDARY DETECTING CIRCUIT Fig. 3 is a detecting circuit which can automatically detect CCM/DCM boundary for PWM/PFM hybrid-mode control converter. Fig. 4 shows the key control waveforms. From Fig. 4, when the inductor current is in CCM, the PWM output end of CCM/DCM detecting circuit will send a high signal to start the constant-frequency-mode control and the PFM output end will send a low signal to close the variable-frequency-mode control; when the inductor current is in DCM, the PWM output end of CCM/DCM detecting circuit will send a low signal to close the constant-frequency-mode control and the PFM output end will send a high signal to start the variable-frequency-mode control. So we can confirm that the converter is operated with constant-frequency-mode control in CCM and operated with variable-frequency-mode control in DCM. B. HYBRID-MODE CIRCUIT As shown in Fig. 5, it consists of a current-mode control oscillator and a variable frequency circuit. On the left of Fig. 5 is the current-mode control oscillator for slope compensation. The oscillator and ramp generator are used to generate the clock and ramp signals for the PWM control and the compensation slope of the current-mode converter, respectively. In Fig. 5, it also consists of a voltage-to-current (V-I) converter and hysteretic comparators. A reference voltage V ref and a resistor R t are used to control the current charging the capacitor C t . When the ramp signal reaches V H , the comparator changes state and the transistor M 5 (acts as a switch) turns on and discharges the capacitor C t . Normally, the discharging current is much larger than the charging current. The ramp signal drops until it reaches V L and the comparator changes state and the transistor M 5 turns off. Therefore, the clock frequency and the slope of the compensation ramp are synchronized with each other and dependent on V ref , R t , C t , V H , and V L . In general, R t and C t
183

are

Fig. 3 CCM/DCM boundary detecting circuit

Fig. 4 Key control waveforms with CCM/DCM boundary detecting circuit

off-chip components such that the switching frequency of the converters can be adjusted for different applications. On the right of Fig. 5 is the key circuit for PWM/PFM hybrid-mode control. The hybrid-mode control circuit has two discharging paths. When the converter is operated in CCM, the aforementioned CCM/DCM boundary detecting circuit sends a low signal to start MOSFET M 13 and close MOSFET M 10 . So the path 2 is used for the constantfrequency-mode control. At this moment, the discharging current at path 2 will be mirrored to discharge the current of the discharging capacitor of the oscillator by the two current mirrors (M 6 ,M 7 ) and (M 8 ,M 9 ). So the MOSFET M 6 will keep turn on to let the discharging current of the discharging capacitor be decided by the current at path 2. Once the converter is operated in DCM, the CCM/DCM boundary detecting circuit sends a high signal to start MOSFET M 10 and close MOSFET M 13 . So the converter uses path 1 to discharge for variable-frequency-mode control. At this moment the discharging current at path 1 will be also mirrored to discharge the current of the discharging capacitor of the oscillator by the two current mirrors. So the MOSFET M 6 still keeps on-state to let the discharging current of the discharging capacitor be decided by the current at path 1. The discharging current for variable-frequency-mode control is decided by the error signal V ea , reference voltage

V ref , and resistor R 2 as shown in Fig. 5. When the load of the converter drops, the output voltage will rise, so the error signal V ea will drops. As a result, when the load of the converter is becoming more and more light, the discharging current (V ea - V ref ) / R 2 at path 1 is becoming more and more small, immediately. So the discharging time of the oscillator will be extended. In other words, the switching frequency of the oscillator will be reduced proportionally with the load to come true the variable frequency function.

PEDS2009 proposed circuit can work functionally and obtain the expected performance. Fig. 6 shows the test circuit for a DC-DC buck converter with PWM/PFM hybrid-mode control. The specification of the proposed PWM/PFM hybrid-mode control circuit is shown in Table II. The simulation and test results for the inductor current, the main switch and the synchronous rectifier switch are shown in Figs. 7 and 8 for different operating modes and loads. These results prove that the inductor current will be cut off as it is below zero with different operating modes and loads to reduce the negative conduction loss. In addition, the main switch and the synchronous rectifier switch can operate normally, too.

Fig. 6 Test circuit for a buck converter with PWM/PFM hybrid-mode control Table II Specification of the proposed PWM/PFM hybrid-mode control Fig. 5 Proposed PWM/PFM hybrid-mode control circuit Item Input voltage Output voltage Full load Input capacitor Output capacitor Inductor Reference voltage Switching frequency Chip area Process SYNC = Low SYNC = High Specification V IN = 5V V o = 3.3V I o_full = 500mA C IN = 10uF C = 50uF L = 2uH V ref = 1.4V f sw = 750kHz (any load) f sw = 750kHz ~ 167kHz (load dependent) 1.5 x 1.5 mm2 TSMC 0.35 u m Mixed-Signal 2P4M Polycide 3.3V / 5V

In addition, the operation modes of converter can be selected by an external voltage signal. We series and parallel the synchronous switches (SYNC) at path 1 and path 2 respectively as shown in Fig. 5. When the SYNC signal is high, the synchronous switches M 11 and M 14 are turned on and turned off respectively. So the converter’s operation mode at the moment will be decided by the CCM/DCM boundary detecting circuit. When the inductor current is in CCM, the converter is operated at constant-frequency-mode (PWM) control; when the inductor current is in DCM, the converter is operated at variable-frequency-mode (PFM) control. On the other hand, when the SYNC signal is low, the synchronous switches M 11 and M 14 are turned off and turned on respectively. In this case, no matter the inductor current is in CCM or DCM, the circuit discharges from path 2 to ground. So the converter at this time is only operated at constant-frequency-mode (PWM) control. . SIMULATION AND TEST RESULTS The DC-DC buck converter with novel PWM/PFM hybrid-mode control circuit has already been detailed explained above. Now the simulation and test waveforms for the DC-DC buck converter with novel PWM/PFM hybrid-mode control circuit will be used to verify the
184

The simulation and test results of the inductor current and V x voltage are also shown in Figs. 7 and 8 for different operating modes and loads. These results verify that when the converter is operated with variable-frequency-mode control, the switching frequency of converter is proportionally decreased with the load to reduce the high switching loss.

PEDS2009

iL
Vgs ,Mp Vgs ,Mn Vx
(a) Constant-frequency-mode (PWM) control at CCM (I L = 500mA) (a)

iL
V gs,Mp
Vgs ,Mn

Vx
Constant-frequency-mode (PWM) control at CCM (I L = 500mA)

iL
Vgs ,Mp Vgs ,Mn Vx
(b) Constant-frequency-mode (PWM) control at DCM (SYNC=low)(I L = 150mA)

iL
V gs,Mp
Vgs ,Mn

V

Vx
(b) Constant-frequency-mode (PWM) control at DCM (SYNC=low)(I L = 150mA)

iL ,
V gs,Mp
Vgs ,Mn

V

iL
Vgs ,Mp Vgs ,Mn Vx

Vx

(c) Variable-frequency-mode (PFM) control at DCM (I L = 50mA) (c) Variable-frequency-mode (PFM) control at DCM (I L = 50mA)

iL
Vgs ,Mp Vgs ,Mn Vx
(d) Variable-frequency-mode (PFM) control at DCM (I L = 20mA) Fig. 7 Simulation waveforms of

iL ,
V gs,Mp
Vgs ,Mn

Vx

(d) Variable-frequency-mode (PFM) control at DCM (I L = 20mA) Fig. 8 Experimental waveforms of

i L , V gs, Mp , V gs, Mn , and V x
185

i L (500mA/div), V gs , Mp (5V/div),

V

V gs , Mn (5V/div), and V x (5V/div)

show the measurement for the load current Fig. 9(a) i L versus output voltage V o when the converter is operated at constant-frequency-mode control and hybrid-mode control, respectively. These test results verify that when the converter is operated at hybrid-mode control, the output voltage of converter is approximately steady in 3.3V with different operating modes and loads. However, if the converter is operated at constant-frequency-mode control, the output voltage will be much deviated from 3.3V when the load is about below 150 mA. Therefore, the hybrid-model control can effectively extend the load operating range of converter.
4.5

PEDS2009 2). When the inductor current is below zero, in order to improve the efficiency at light load, the synchronous rectifier switch is cut off automatically to reduce the negative conduction loss. 3). Simulation and test results verify that no matter the converter is operated at constant-frequency-mode control or hybrid-mode control, the output voltage of the converter is nearly steady in 3.3V with many different operating modes and loads. However, the load operation range with hybrid-mode control can be extended more than the constant-frequency-mode control. In addition, the proposed approach, PWM/PFM hybrid-mode control, is able to significantly improve the light-load efficiency of a DC-DC buck converter.

4

Vo (V)

Acknowledgement
3.5

3

2.5

The authors will give their thanks to the CIC support for chip implementation and financial support of National Science Council (Taiwan) under the grant NSC 97-2221E-224-067.
0 100 200 300 Load current (mA) 400 500

(a) Constant-frequency-mode control (SYNC = Low)
4.5

REFERENCES
Sang-Hwa Jung, Nam-Sung Jung, Jong-Tae Hwang, and Gyu-Hyeong Cho, “An Integrated CMOS DC-DC Converter for Battery-Operated Systems”, Power Electronics Specialists Conference (PESC’99), Vol. 1, pp.43-47, 27 June-1 July, 1999. [2] B. Arbetter, R. Erickson, and D. Maksimovic, “DC-DC Converter Design for Battery-Operated Systems”, Power Electronics Specialists Conference (PESC’95), Vol. 1, pp.103-109, 18-22 June, 1995. [3] X. Zhou, M. Donati, L. Amoroso, and F. C. Lee, “Improved Light-Load Efficiency for Synchronous Rectifier Voltage Regulator Module”, IEEE Transactions on Power Electronics, Vol. 15, NO.5, pp.826-834, September, 2000. [4] X. Zhou, T. G. Wang, and F. C. Lee, “Optimizing Design for Low Voltage DC-DC converters”, Applied Power Electronics Conference and Exposition (APEC’97), Vol. 2, pp.612-616, 23-27 February, 1997. [5] T. G. Wang, X. Zhou and F. C. Lee, “A Low Voltage High Efficiency and High Power Density DC/DC converter”, IEEE Transactions on Power Electronics, Vol. 1, pp.240-245, January, 1997. [6] C. F. Lee and P. K. T. Mok, “A Monolithic Current-Mode CMOS DC-DC Converter With On-Chip Current-Sensing Technique”, IEEE Journal of Solid-State Circuit, Vol. 39, NO.1, pp.3-14, January, 2004. [7] C. F. Lee and P. K. T. Mok, “On-Chip current sensing technique for CMOS monolithic switch-mode power converters,” in IEEE Int. Symp. Circuits and Systems, vol. 5, Scottsdale AZ, May 2002, pp. 265-268. [8] C. Y. Leung, P. K. T. Mok, Ka Nang Leung and Mansun Chan, “An Integrated CMOS Current-Sensing Circuit for Low-Voltage Current-Mode Buck Regulator,” IEEE Transactions on Circuits and Systems, Vol. 52, NO. 7, July, 2005 [9] R. Sahu and G. A. Rincon-Mora, “A High-Efficiency, Dual-Mode, Dynamic, Buck-Boost Power Supply IC for Portable Applications” 2005 18th International Conference on VLSI Design, pp.858-861, 3-7 January, 2005. [10] V. Yousefzadeh, N. Wang, Z. Popovic, and D. Maksimovic, “A Digitally Controlled DC/DC Converter for an RF Power Amplifier”, IEEE Transactions on Power Electronics, Vol. 21, NO.1, pp.164-172, January, 2006. [11] R. B. Ridley, “A New Continuous-Time Model for Current-Mode Control with Constant Frequency, Constant On-Time, and Constant Off-Time, in CCM and DCM ”, IEEE Transactions on Power Electronics, Vol. 1, pp.382-389, January, 1990. [1]

4

Vo (V)

3.5

3

2.5

0

100

200

300 Load current (mA)

400

500

(b) Hybrid-mode control (SYNC = High) Fig. 9 Measurements of load current vs. output voltage

. CONCLUSIONS For the low-voltage and low-power applications, the synchronous rectifier technology has been widely used. However, the disadvantage of this topology is its low efficiency at light load, due to the higher conduction loss and gate drive loss. In order to improve the efficiency at light load, this paper proposes a novel topology by utilizing the PWM/PFM hybrid-mode control. The advantages of PWM/PFM hybrid-mode control technique include several items below. 1). A novel PWM/PFM hybrid-mode control topology has been presented. The operation modes of the converter can be selected by an external voltage signal (SYNC). When SYNC is a low signal, the converter will be operated at the constant-frequency-mode control; When SYNC is a high signal, the converter will be operated at the hybrid-mode control.
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