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索尼爱立信W760原厂图


Pages B1-B15 AMPCTRL DCDC_ON AMPCTRL Port DCDC_ON VAUDIO26 OPTO_EN OPTO_EN VBATI VDIG VCC_WPA VAUDIO26 VBACKUP VAGPS28 VBACKUP VDDE18 VBATI VDDE18 VDIG VccA VCC_WPA VBT27 VAUDIO26 VBEAR26 VBA

CKUP VAGPS20 VAGPS28 FLASH_STROBE VBACKUP OPTOSENSE VAUDIO26 OPTO_EN I2CCLK1 I2CDAT1 MCLK TX_ADSTR MCLKREQ DCDC_EN BT_CLK TESTOUT RTCCLK WPAVCC BTRESn BT_CLKREQ MICN/AUXinR LD_AD MICP/AUXinL VAD SPL SPR FM_AGPSRESn FM_ANTENNA VBATI VAUDIO26 VDDE18 Application & Sys.Performance VBEAR26 Pages A1-A4 VBT27 VBATI VDIG VDDE18 VAGPS20 VAUDIO26 VAGPS28 VBEAR26 VAGPS28 VDIG VCC_WPA VAGPS20 VBATI VDDE18 VccA VCC_WPA VDDE18 Pages R1-R4 VBT27 VccA VBATI Port CAMSYSCLK I2CCLK1 I2CDAT1 CAMSYSCLK OPTO_EN I2CCLK1 I2CDAT1 CAMSYSCLK FLASH_STROBE OPTOSENSE VBATI VDDE18 VDIG Pages I1-I4 VccA VBT27 VBEAR26 VAGPS20 VDDE18 VDIG VBATI

Access side GPIO mapping Usage USB_HSSTP USB_HSDIR CTMS CFMS_AIO USB_HSINCLK USB_HSNXT USB_HSDATA4 USB_HSDATA5 USB_HSDATA6 USB_HSDATA7 UART3_RX UART3_TX UART3_CTS UART3_RTS BT_SPI_INT AGPS_PWRON USB_HSCHIP_SEL AGPS_SYNC USB_HSDATA3 BT_SPI_CSn BT_SPI_DI BT_SPI_DO BT_SPI_CLK AGPS_LDO_EN Page B13 B13 B13 B13 B13 B13 B13 B13 B13 B13 R04 R04 R04 R04 R03 R04 B13 R04 B13 R03 R03 R03 R03 R04

AccGPIO00 AccGPIO01 AccGPIO02 AccGPIO03 AccGPIO04 AccGPIO05 AccGPIO06 AccGPIO07 AccGPIO08 AccGPIO09 AccGPIO10 AccGPIO11 AccGPIO12 AccGPIO13 AccGPIO14 AccGPIO15 AccGPIO16 AccGPIO17 AccGPIO18 AccGPIO19 AccGPIO20 AccGPIO21

MCLKREQ BT_CLK RTCCLK BTRESn Imaging

AccGPIO22 AccGPIO23

Application side GPIO mapping Usage FM_INT APP_LOG FLIPSENSE Page A04 B13 B14

AppGPIO00 AppGPIO01 AppGPIO02 AppGPIO03 AppGPIO04 AppGPIO05 AppGPIO06 AppGPIO07 AppGPIO08 AppGPIO09 AppGPIO10 FM_AGPSRESn RTCCLK I2CDAT1 I2CCLK1 MICN/AUXinR MICP/AUXinL FM_AGPSRESn FM_ANTENNA MICN/AUXinR WPAVCC MICP/AUXinL VAD FM_AGPSRESn FM_ANTENNA DCDC_ON Access AMPCTRL Audio GPO1 SPR SPL VAD LD_AD BT_CLKREQ WPAVCC TESTOUT DCDC_EN TX_ADSTR MCLK VDDE18 GPO2 GPO3 Port GPO0 SPL SPR LD_AD BT_CLKREQ MCLKREQ BT_CLK RTCCLK BTRESn MCLK TX_ADSTR DCDC_EN TESTOUT AppGPIO11 AppGPIO12 AppGPIO13 AppGPIO14 AppGPIO15

GPIO_AP110_RESn B15 AP110_INT_B
CAM_PWDN

B15 A03 B15 B15 B15 B15 A03 B13 B12 B14 B14 B03

AP110_SPI_CS0 AP110_SPI_DI AP110_SPI_DO AP110_SPI_CLK CAM_LDO_EN VBUS_OVP MSDETECT AX_INT1 AX_INT2 DCON

DCDC_ON AMPCTRL

AP110 OUTPUTS Usage NOT USED NOT USED DCDC_ON AMPCTRL Page B15 B15 B15 B15

Page T1

VDDE18 OPTOSENSE

Test

E1000 1 Clamp GND Will be connected to GND in PCB GND 1

E1001 Clamp GND Will be connected to GND in PCB GND 1

E1002 Clamp GND Will be connected to GND in PCB GND 1 X1000 1201-7446 NM

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J TAYLOR R. SHARPE 4/8/2008 14

M4 Top Schematic
M4 Top

SHIELDCAN_DEENA_BB_LARGE 1201-1291

SHIELDCAN_DEENA_BB_SQUARE 1201-1292

SHIELDCAN_DEENA_GPS 1201-1294

Circuit Diagram Deena
1200-9416
1 of 1

VBATI

VDDE18

VDIG VBACKUP VAUDIO26

VBATI VDDE18 VDIG VBACKUP VAUDIO26 VBATI VBACKUP VDDE18 VDIG

Page 3 VDIG VDDE18

VBACKUP VBATI

I2CCLK1 I2CDAT1 CAMSYSCLK

I2CCLK1 I2CDAT1 CAMSYSCLK

I2CCLK1 I2CDAT1 CAMSYSCLK Camera

FLASH_STROBE

FLASH_STROBE

VDIG

VAUDIO26 VDDE18

VBATI

Page 2 VBATI VDDE18 VAUDIO26 VDIG LED_SPARE_1 LED_SPARE_2 OPTO_EN OPTO_EN OPTOSENSE Display OPTOSENSE OPTOSENSE

VBATI

Page 4 VBATI

LED_SPARE_1 LED_SPARE_2

LMU

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR R. SHARPE 4/8/2008 14

Imaging
Imaging Top

Circuit Diagram Deena
1200-9416
I 1 of 4

VDIG VBATI VBATI VDDE18 VAUDIO26 VDIG VDDE18 VAUDIO26 R4200 0ohms 1000-0181 X4200 R4201 0ohms VBATI VDDE18 VAUDIO26 VDIG 1000-0181 <NM> ST4200 1 2 1000-0048 1000-0048 C4213 100nF C4214 100nF GND STRAP 0201 SIZE C4232 47pF 1000-0067

HINGE FPCCONNECTOR
61 VBATI 42 VBATI 91 93 7 94 95 96 97 LCD_DAT3 LCD_RESET LCD_DAT0 LCD_DAT1 LCD_DAT2 VAUDIO26 VDDE18

LCD_RESn LCD_DAT0 LCD_DAT1 LCD_DAT2 LCD_DAT3 D2000 Anja-PoP bottom - IMAGING DISPLAY INTERFACE PDI_RESn PDI_D0 PDI_D1 PDI_D2 PDI_D3 PDI_D4 PDI_D5 PDI_D6 PDI_D7 PDI_C0 PDI_C1 PDI_C2 PDI_C3 PDI_C4 PDI_C5 DB3150FBT/7POPHF 1208-0056 3A M18 M23 L22 M24 L23 C4219 1000-0067 Place C4215 to C4228 close to connector 47pF 1000-0067 C4220 47pF 1000-0067 L24 M25 K23 K24 P23 P22 N24 N18 N22 M22 1000-0067 1000-0067 1000-0067 XXpF max. capacitive load C4227 47pF 1000-0067 C4215 C4216 47pF 47pF 1000-0067 1000-0067 C4217 47pF 1000-0067 C4218 47pF 1000-0067

LCD_DAT4 LCD_DAT5 LCD_DAT6 LCD_DAT7

98 1 2 3 LCD_DAT4 LCD_DAT5 LCD_DAT6 LCD_DAT7

C4221 47pF 1000-0067 C4222 47pF LCD_FMARK LCD_WR LCD_RS LCD_CS LCD_RD 19 4 6 92 5 PDIC1 PDIC1 PDIC2 PDIC3 PDIC4

1000-0067

1000-0067

VBATI

C4231 47pF

C4223 47pF

C4225 47pF C4226

Max 20mA current

VBOOST_LED LED_LCD C4204 33pF 25V <NM> 1000-6203

99 100 LCD_BL_A LCD_BL_K

C4224 47pF

VBATI R4230 0ohms 1000-0179 L4201 22uH 1000-0130 VLF3012AT-220MR33 G N4201 D1

47pF C4204 should be located close to X4200

R4231 0ohms 1000-0179

VBATI 2

N4210

C4240 33pF 25V <NM>

1200-0286

CE

GND 3V

1000-0059

N2000 Ericsson AB 3100 MMI 1000-0048 BOOST LED DRIVER A1 VDD_BOOST SW_BOOST BOOST_ISP C4230 100nF BOOST_ISN VBOOST AB3100 1202-0639

C4200 2.2uF L4200 100MHz 1000-0128 C2 D2 B2

S D2

C4202 330pF 25V 1 1000-0051 3 C4250 1uF GND C4205 33pF <NM> IN GND

1000-6203

OUT

4 1000-0061 C4251 10uF 1000-0067 C4252 47pF

87 VOPTO30

E3

A

C

1200-1061 R4211 910Kohms 1%

1000-6203 1000-6203

R4202 0ohms <NM> 1000-0181 C4201 33pF <NM>

C4208 33pF <NM>

R1115Z301D 1000-8623

1000-0076

The LED driver should have a separate groundplane. It should be connected to phone ground in one point. This is the ISENSEnode.

1000-0056

R4203 150mohms 1000-0264

SCH2819 1001-0077

GND GND

GND

R4212 62Kohms 1% 1000-4160 C4203 1uF 25V

R4207 OPTOSENSE 47Kohms 1000-0239 GND

89 OPTOSENSE

60 85 90 59 LED_KEY LED_NAV LED_NAV_SIDE VIBR

OPTO_EN

OPTO_EN R4250 100Kohms 1000-0231 43 LED_LCD GND 1000-0059 GND C4206 2.2uF

1000-0422

N2000 Ericsson AB 3100 MMI INDICATOR LED CONTROL LED1_N LED2_N LED3_N LED4_N LED5_N LED6_N VIBRATOR CONTROL C14 VIBR_OUT AB3100 1202-0639 VDD_VIBR 3A B14 1000-0048 C4229 100nF B4 A4 D3 C3 A3 B3 VBATI

GND

Other parts of this connector are located at pages: I03 A02 B12 B14 OPTOSENSE

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson
LED_SPARE_1 LED_SPARE_2

J TAYLOR R. SHARPE 4/8/2008 14

Imaging
Display

Circuit Diagram Deena
1200-9416
I 2 of 4

VBACKUP VDIG VDDE18

VBATI

VBACKUP VBACKUP VDIG VDDE18 VBATI 1201-8772 C4320 68uF X4200 21 GND 24 101 102 103 104 45 46 47 48 49 SP4300 50 GND 51 CAMRESn D2000 Anja-PoP bottom - IMAGING CAMERA INTERFACE G23 CI_RESn CI_PCLK CI_HSYNC CI_VSYNC CI_D0 CI_D1 CI_D2 CI_D3 CI_D4 CI_D5 CI_D6 CI_D7 DB3150FBT/7POPHF 1208-0056 3A H23 H22 F22 G22 H24 E20 J23 J24 K22 J25 K25 33pF C4308 1000-0056 33pF C4310 1000-0056 33pF C4306 1000-0056 C4314 1000-0056 1000-0056 33pF C4313 CI_PCLK CI_HSYNC CI_VSYNC CI_D0 CI_D1 CI_D2 CI_D3 CI_D4 CI_D5 CI_D6 CI_D7 1000-0056 C4312 11 22 18 29 13 17 9 28 8 27 30 CAM_PCLK CAM_HSYNC CAM_VSYNC CAM_DAT0 CAM_DAT1 CAM_DAT2 CAM_DAT3 CAM_DAT4 CAM_DAT5 CAM_DAT6 CAM_DAT7 25 CAM_RESET 52 53 54 55 56 66 67 73 76 77 80 81 82 83 86 88 1000-0422 X4200

HINGE FPCCONNECTOR

33pF

33pF C4311

33pF C4315

33pF C4305

C4307

C4309

33pF

Place C4305 to C4315 close to connector

GND

1000-0056

1000-0056

1000-0056

1000-0056

1000-0056

33pF

33pF

I2CDAT1 I2CCLK1 CAMSYSCLK

I2CDAT1 I2CCLK1 CAMSYSCLK 1000-0067 47pF C4316 33pF C4317 1000-0056 33pF C4318

15 16 26 I2CDAT I2CCLK CAMSYSCLK 1000-0056

D2000 APPLICATION GPIO_05 R24 R4301 100Kohms 1000-0231 D2000 APPLICATION GPIO_10 DB3150FBT/7POPHF 1208-0056 3A T24 CAM_LDO_EN

CAM_PWDN

23 CAM_PWDN

N4301 1 4 6 2 VDD ECO CE NC GND 5 C4351 10uF 1000-0061 VOUT 3 12 VCAM13

R4300 100Kohms 1000-0231 VBATI

R4302 R1161D181B 47Kohms 1200-0373 1.8V N4302 2 6 VDD CE1 CE2 VOUT1 VOUT2 GND C4302 R5323Z022B_TR_FD 1000-8638 47nF 1.5V 1 3 5

GND

GND

14 10 C4352 4.7uF 1000-0039 C4354 47pF 1000-0067 VCAM28 VCAM18

C4350 1uF 1000-0051

4

GND

C4353 4.7uF 1000-0039 GND GND

C4355 47pF 1000-0067 1000-0422 GND

GND GND

Confidential
Other parts of this connector are located at pages: A02 B12 B14 I02 FLASH_STROBE

GND

Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR R. SHARPE 4/8/2008 14

NC

Imaging
Camera

Circuit Diagram Deena
1200-9416
I 3 of 4

VBATI

VBATI

A

A

A

A

1001-0630

1001-0630

1001-0630

1001-0630

VBATI

C

C

C

<NM>

C

<NM>

<NM>

<NM>

R4110 22ohms 1000-4034

R4111 22ohms 1000-4034

R4112 22ohms 1000-4034

R4113 22ohms 1000-4034

<NM>

C

V4101 WHITE <NM>

V4102 WHITE <NM>

V4103 WHITE <NM>

V4104 WHITE <NM>

1001-0630

A V4105 WHITE <NM> R4114 22ohms 1000-4034

LED_SPARE_2

LED_BACK

X4100

LED_SPARE_1

LED_WALKMAN

4

10 1000-0056 C4117 33pF <NM>

7 9 11

VBATI

6 1 1000-0056 2 13 14 15 5 C4127 33pF <NM>

Z1 Z2 Z3 Z4 1201-1309 GND 16-PIN Connector Another part of this connector is located on page B7 and B14

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J TAYLOR R. SHARPE 4/8/2008 14

Imaging
LMU

Circuit Diagram Deena
1200-9416
I 4 of 4

BT_CLKREQ MCLK

BT_CLKREQ MCLK

DCDC_ON AMPCTRL

AP110_RESn PWRRSTn

VDD_LP VDIG VAUDIO26 VMC18 VDDE18 VBATI VCORE18

VDDE18_ANJA

VDDE18

Pages 2-5 PWRRSTn VCORE18 Pages 10-15 VBATI VDDE18 DCDC_ON VMC18 AMPCTRL VAUDIO26 VDIG PWRRSTn AP110_RESn RTCCLK TESTOUT LD_AD VAD TX_ADSTR OPTOSENSE TESTOUT LD_AD VAD TX_ADSTR OPTOSENSE TESTOUT System Control LD_AD VAD TX_ADSTR OPTOSENSE SYSCLK2 SPL SPR FLASH_STROBE SPL SPR FLASH_STROBE SPL SPR FLASH_STROBE MICN/AUXinR MICP/AUXinL FM_ANTENNA MICN/AUXinR MICP/AUXinL FM_ANTENNA FM_ANTENNA MICN/AUXinR MICP/AUXinL FM_ANTENNA VBUS VBACKUP Connectivity SYSCLK2 DCIO I2CDAT1 I2CCLK1 I2CDAT1 I2CCLK1 I2CDAT1 I2CCLK1 I2CDAT1 I2CCLK1 SERVICEn ONSWAn SERVICEn ONSWAn MCLK SERVICEn ONSWAn SYSCLK2 BTRESn FM_AGPSRESn BTRESn FM_AGPSRESn BTRESn FM_AGPSRESn AGPS_LDO_EN BT_CLKREQ AGPS_LDO_EN CAMSYSCLK MCLKREQ VDDE18 VDDE18_ANJA VDD_LP AP110_RESn RTCCLK BT_CLK RTCCLK BT_CLK CAMSYSCLK MCLKREQ RTCCLK BT_CLK CAMSYSCLK MCLKREQ

VBACKUP

VBATI

VDDE18 VDDE18_ANJA

VMC18

VDD_LP

VAUDIO26 VDIG

VCORE18

Pages 6-9 VBUS DCIO VBUS DCIO VBATI VDDE18 VDDE18_ANJA VMC18 VDIG VBACKUP VDD_LP VAUDIO26 VBEAR26 VCORE18 VAGPS20 VAGPS28 AGPS_LDO_EN VBT27 WPAVCC DCDC_EN WPAVCC DCDC_EN WPAVCC DCDC_EN VccA VCC_WPA OPTO_EN Power VBT27 VccA VCC_WPA VBT27 VccA VCC_WPA OPTO_EN VAGPS20 VAGPS28 VAGPS20 VAGPS28 VAUDIO26 VBEAR26 VAUDIO26 VBEAR26 VDIG VBACKUP VDIG VBACKUP VBATI VDDE18 VBATI VDDE18

Confidential
Approved according to 00021-LXE 107 42/1

KRETSSCHEMA

CIRCUIT DIAGRAM

Sony Ericsson

J. TAYLOR 4/8/2008 14

Application & Sys.Performance R. SHARPE Perf&Apps Top

Circuit Diagram Deena
1200-9416
B 1 of 15

VDDE18

VDD_LP VDDE18_ANJA

VDDE18 VDD_LP VDDE18_ANJA

VDD_LP

VDDE18 Page 3 PWRRSTn AP110_RESn VDDE18 VDD_LP BT_CLK CAMSYSCLK RTCCLK PWRRSTn AP110_RESn BT_CLK CAMSYSCLK RTCCLK MCLKREQ PWRRSTn AP110_RESn BT_CLK CAMSYSCLK RTCCLK MCLKREQ

BT_CLKREQ AGPS_LDO_EN

BT_CLKREQ AGPS_LDO_EN

BT_CLKREQ AGPS_LDO_EN

MCLKREQ

SYSCLK2 MCLK SERVICEn ONSWAn MCLK SERVICEn ONSWAn MCLK SERVICEn ONSWAn Clocks & Resets BTRESn FM_AGPSRESn MEMRESn

SYSCLK2 BTRESn FM_AGPSRESn

SYSCLK2 BTRESn FM_AGPSRESn

MEMRESn

VDDE18_ANJA

Page 4 MEMRESn

VDDE18_ANJA Memories

Do not insert block B05_System_PoP_IF

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

M WAYLAND 4/8/2008 14

Application & Sys.Performance R. SHARPE System Top

Circuit Diagram Deena
1200-9416
B 2 of 15

VDDE18

VDD_LP

VDDE18 VDD_LP

VDDE18

VDDE18

R2119 100Kohms 1000-0231

R2121 10ohms 1000-0378 1 2

D2105 OE A Y 4 3 1000-0181 R2101 100Kohms 1000-0231 R2118 0ohms

R2120 0ohms <NM> 1000-0181 BT_CLK BT_CLK

3 AGPS_LDO_EN V2100 DTC114EM3T5G 1000-0286 2 C2121 4.7uF GND 5 1000-0039

VCC GND

1

SN74LVC1G125YZPR 1200-0425

RTCCLK D2000 Anja-PoP bottom - SYSTEMLEVEL CLOCKS MCLK MCLK RTCCLK BT_CLKREQ AB16 AB17 AB18 MCLK RTCCLKIN SYSCLK0REQn MCLKREQ SYSCLK0 SYSCLK1 SYSCLK2 R2100 120Kohms 1000-4164 INTERRUPTS AE22 AD22 MSACCIRQn MSAPPIRQn RESETS 1000-0050 T13 PWRRSTn RESOUT0n RESOUT1n RESOUT2n POWER CONTROL ACCSLEEP APPSLEEP DCON AB20 SP2105 AD17 AB23 AC23 AE18 AD18 MEMRESn FM_AGPSRESn BTRESn AC16 AC18 AC17 AB19 1 ST2100 STRAP 2 L2100 27nH 1000-6882 1200-0177 R2104 33ohms 1000-4035 R2133 0ohms 1000-0181 <NM> MCLKREQ CAMSYSCLK C2100 150pF SP2101

RTCCLK

MCLKREQ CAMSYSCLK AP110_RESn

GND

SYSCLK2

MEMRESn FM_AGPSRESn BTRESn

C2104 1nF

SERVICEn

SERVICEn

AD19

SERVICEn DB3150FBT/7POPHF 1208-0056 3A

PWRRSTn

Connect to ground plane in one single point B2100 XTAL1 ONSWAn ONSWAn N2000 SP2107 SP2103 Ericsson AB 3100 SYSTEM CONTROL SYSTEM POR E13 E14 PWRRSTn Mount close to N2000 RTC 1 ST2105 2 B11 XTAL_OUT XTAL1 XTAL2 CLOCK SLEEP_A E11 SLEEP_B MCLK AB3100 1202-0639 3A SP2104 SP2106 D14 H13 PWRREQn A10 D11 E12 IRQA_N IRQB_N PWRRST_N ONSWA_N ONSWB_N ONSWC F13 F12 F11 1000-6078 C2103 18pF C2 C1 XTAL2 1000-6078

1000-0036 32.768KHz

C2102 18pF

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

M WAYLAND 4/8/2008 14

Application & Sys.Performance R. SHARPE System Control Clocks & Resets

Circuit Diagram Deena
1200-9416
B 3 of 15

VDDE18_ANJA

VDDE18_ANJA

D2000 Anja-PoP-bottom - SYSTEMLEVEL DIRECT-PoP - MEMORY ACCESS NOR_WPn NOR_VPP NOR_DPD NOR_RSTn NAND_WPn SD_TEMP DB3150FBT/7POPHF 1208-0056 3A J9 J13 J14 D2000 J15 J11 D25 MEMRESn E14 D12 B12 E16 MEMRESn D14 D15 D16 E15 E17 D2000 Anja-PoP bottom - SYSTEMLEVEL SHARED MEMORY IF (EMIF1) E3 E4 F4 F5 G4 G5 H4 H5 J4 J5 K4 K5 L4 L5 M4 M5 SH_D00 SH_D01 SH_D02 SH_D03 SH_D04 SH_D05 SH_D06 SH_D07 SH_D08 SH_D09 SH_D10 SH_D11 SH_D12 SH_D13 SH_D14 SH_D15 SH_A01 SH_A02 D2 E19 E2 D21 E22 F2 F3 G2 G3 H3 J3 J2 K2 K3 L2 L3 M3 Net VDDE18_ANJA is only used to make the CAD easier due to memory pull-ups R2102 and R2103 SH_SDCSn SH_SDCASn SH_WEn SH_SDCLK SH_SDCKEN SH_SDRAS SH_BE0n SH_BE1n DB3150FBT/7POPHF 1208-0056 3A C7 D3 D5 D6 C6 D4 E5 B5 C11 D11 R2103 3.3Kohms 1000-0243 R2102 3.3Kohms 1000-0243 VDDE18_ANJA E18 D19 C23 Anja-PoP bottom - SYSTEMLEVEL APPLICATION MEMORYIF(EMIF2) AP_D00 AP_D01 AP_D02 AP_D03 AP_D04 AP_D05 AP_D06 AP_D07 AP_D08 AP_D09 AP_D10 AP_D11 AP_D12 AP_D13 AP_D14 AP_D15 AP_A01 AP_A02 AP_A03 AP_A04 AP_A05 AP_A06 AP_A07 AP_A08 AP_A09 AP_A10 AP_A11 AP_A12 AP_A13/AP_SDBS0 AP_A14/AP_SDBS01 AP_A15/AP_SDBS1 AP_A16/ALE/SH_A16 AP_A17/CLE/SH_A17 AP_A18/NF_D00/SH_A18 AP_A19/NF_D01/SH_A19 AP_A20/NF_D02/SH_A20 AP_A21/NF_D03/SH_A21 AP_A22/NF_D04/SH_A22 AP_A23/NF_D05/SH_A23 AP_A24/NF_D06/SH_A24 AP_A25/NF_D07/SH_A25 AP_A26/CRE/AP_OEn/SH_A26 B14 B15 C15 B16 C16 C17 C18 B18 B19 D18 C19 C20 D20 B23 B22 C21 C22 B20 D23 D22 F24 E24 F23 F25 G24 H25

SH_A03 J10 SH_A04 SH_A05 SH_A06 SH_A07 SH_A08 SH_A09 SH_A10 SH_A11 SH_A12 SH_A13 SH_A14 SH_A15

Even if these pins (EMIF) are left unconnected they are still active due to the PoP interface

E21

AP_CLK AP_SDCLK AP_SDCLK_FB AP_SDCKEN ADVn/AP_SDRAS AP_OEn/REn/AP_SDCAS/SH_OEn AP_CS0n/NF_CSn/SH_CS0n AP_CS1n/NF_CSn/SH_CS1n AP_CS2n/NF_CSn/AP_SDCSn AP_BE0n/SH_BE0n AP_NF_READY AP_WAITn DB3150FBT/7POPHF 1208-0056 AP_BE1n/SH_BE1n AP_WEn 3A

C13 C12 B13 E12 D13 B11 C10 D10 J12 E13 C14 E11

XD2000 POP Symbol POP_symbol KAL00T00MM-AJ55_POP 1204-3781 1

Confidential
Approved according to 00021-LXE 107 42/1

KRETSSCHEMA

CIRCUIT DIAGRAM

Sony Ericsson

J. TAYLOR 4/8/2008 14

Application & Sys.Performance R. SHARPE System Memories

Circuit Diagram Deena
1200-9416
B 4 of 15

Page 9 VCORE18

Power Memories

Page 8 VDDE18 VANA25 VCORE12 VDDE18 VANA25 VCORE12 VDDE18_ANJA VDDE18_ANJA VDDE18_ANJA

Power Asics

Page 7 VBUS DCIO VBUS DCIO VBUS DCIO VBATI VCORE18 VDDE18 VANA25 VCORE12 VMC18 VAUDIO26 VBT27 VDIG VBEAR26 VBACKUP VDD_LP VAGPS20 VAGPS28 AGPS_LDO_EN WPAVCC DCDC_EN WPAVCC DCDC_EN WPAVCC DCDC_EN VccA VCC_WPA OPTO_EN Regulators & Charging VDDE18 VANA25 VCORE12 VMC18 VAUDIO26 VBT27 VDIG VBEAR26 VBACKUP VDD_LP VAGPS20 VAGPS28 AGPS_LDO_EN VccA VCC_WPA OPTO_EN VMC18 VAUDIO26 VBT27 VDIG VBEAR26 VBACKUP VDD_LP VAGPS20 VAGPS28 AGPS_LDO_EN VccA VCC_WPA OPTO_EN VBATI VBATI VCORE18 VDDE18 VBATI VCORE18 VDDE18

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR 4/8/2008 14

Application & Sys.Performance R. SHARPE Power Top

Circuit Diagram Deena
1200-9416
B 6 of 15

VDDE18 ST2202 1 1 ST2203 1 ST2208 1 ST2212 N2000 VBATI Ericsson AB 3100 POWER LDO REGULATORS 1000-0039 X2200 1000-0051 1000-6901 4.7uF Mount C2211 and C2212 close to battery connector K14 1000-6082 1 VBAT_B LDOG 1.5 - 2.85V LDOD 2.65V LDOF 1.05 - 2.5V LDOE 0.9 - 2.8V LDOH 1.2 - 2.75V LDOK 1.8 - 2.75V LDOC 2.65V LPREG 2V R2250 0ohms 1000-0181 B12 GND FGSENSEN 1200-2387 GND FG sense lines, pin F11 and F12 on N2000, should be routed together and connected directly to pads for R2200 (no current conducting via allowed between connection point and pad). FGSENSEN_BAT_GND <NM> 1000-0039 C2200 4.7uF C2202 4.7uF 0ohms R2251 1000-0181 VBAT_C Buck 0.9 - 1.8V 5% VBUCK VSS_BUCK AB3100 1202-0639 3A C2220 100nF 1000-0336 C2219 10uF 1000-0061 V2206 1000-0087 MOD1 BUCK REGULATOR BUCK_FB E1 D1 C1 B1 L2200 4.7uH 1 1000-0061 1000-0061 1200-0119 C2240 10uF STRAP C2221 100nF 1000-0048 VANA25 VBATI LDOG_OUT LDOD_OUT LDOF_OUT LDOE_OUT LDOH_OUT LDOK_OUT LDOC_OUT LDOLP_OUT L13 L12 G13 G14 L14 M14 N12 D13 1000-0048 100MHz C2225 2.2uF C2218 1uF 1000-0051 1 ST2213 1 ST2214 1 2 VBEAR26 R2204 4.7Kohms 1000-0249 2 VDIG 2 VBT27 2 2 ST2204 2 2 VMC18 VAUDIO26

VANA25

VMC18 VAUDIO26 VANA25 VDDE18 VBT27 VDIG VBEAR26 VBACKUP VDD_LP

1000-0064

C2211 100pF

C2212 3.3pF

F14

VBAT_E

C2213

C2216

1uF

C2214 2.2uF 1000-6901

1000-6901

M13

BDATA 2 3 R2200 1 C 25mohms 1000-0246 0201 LAY ON R2200 PAD 2 A 1 ST2205 STRAP 2 1000-0048 N14 C2250 100nF VBAT_G

1000-0061

VBAT_F

1000-6901

C2209 2.2uF

C2205 2.2uF

C2215 10uF VBATI

C2218 close to N2000

VAGPS28 VAGPS20

VAGPS20 VAGPS28

V2200 1000-0282

4 5

VCORE18

VBATI

L2201

1000-0118

C2226 100nF VBATI ST2206 2 VCORE12 VCORE18 VCORE12

D2000 VBATI ACCESS GPIO_23 U24 AGPS_LDO_EN VAGPS20 1208-0056 AGPS_LDO_EN A1 C3 B2 R2207 100Kohms 1000-0231 N2207 LDO REGULATOR EN IN GND TPS79920YZUR 1200-3994 2V OUT NR C1 A3 C2227 10nF 1000-0045 1 STRAP ST2221 2

Place C2200 and C2202 close to N2000

C2222 10uF

VCORE18

N2202 ST2217 1 ST2216 VDD ECO 1.8 NC GND 5 1000-0061 CE VOUT 3 1 2 1 2 4 6 1000-0051 2

Local ground plane Connect local ground plane to main ground plane in one point only Use multiple vias

1000-0061

GND

C2238 1uF <NM>

R1161D181B 1200-0373 1A 1.8V <NM>

C2239 10uF <NM>

GND

C2224 10uF

Radio Power Supply
N2000 Ericsson AB 3100 POWER RADIO ST2215 K12 VBAT_A LDOA 2.8V LDOA_OUT EXT_LDO C2229 100nF AB3100 1202-0639 3A K13 C12 1000-6901 VDD_A 1 2 VccA VccA

VAGPS28 N2208 2 1000-0048

CE

2.8V L2202 100MHz C2228 10uF 1000-0061 1201-9198

C2230 2.2uF

1 3 C2217 1uF 1000-0051

IN GND

OUT

4

OPTO_EN

OPTO_EN

R1115Z281B-TR 1000-8818

N2000 Ericsson AB 3100 POWER BATTERY UART A11 FGSENSEN_BAT_GND 1000-0067 Place C2207 close to N2000 Charge sense lines, pin H1 and H2 on N2000, should be routed together and connected directly to pads for R2201 (no current conducting via allowed between connection point and pad). FGSENSEN C2207 47pF J14 J13 BDATA FUEL GAUGE 1000-0179 FGSENSEP FGSENSEN X4100 CHARGER CONTROL G2 R2201 100mohms 1000-4666 6 D 7D H3 J2 F1 1200-0145 FDMA1027P 5G 2 G F3 G1 1200-0145 FDMA1027P E2 H2 H1 VBAT_D CHSENSEN CHSENSEP 2 V2201 1000-7571 <NM> 1 GND GND 1000-0048 1200-0879 DCIO VBAT_H VDD_REF AB3100 1202-0639 3A GND 1000-0067 CHREG DCIO_INT DCIO VBUS TRICKLE F2 CHLED 8 VANA25 1000-0061 C2249 10uF 2 5 4 GND2 GND5 SHDN MAX8640Y-1.8 1200-6420 1000-0061 C2248 10uF R2209 0ohms 6 VBATI VCORE18

N2209 MAX8640 IN LX OUT 1 3 L2209 2.2uH 1200-2028 ST2222 1 STRAP 2

Use multiple vias and copper plane heat sink
DCIO DCIO V2202 D8 D 3 4 S 1 S V2202

1201-1309 16-PIN Connector Another part of this connector is located on page B14 and I4 C2251 47pF <NM>

GND

Space for cooling as large as possible
Please note that V2202 requires an heatsink area of 1square inch to get sufficient heat transportation from the charge switch

C2241 1uF

C2210 100nF

C2242 1uF 1000-0051

Place C2210 close to N2000

PA Power Supply
N2000 Ericsson AB 3100 POWER IO LEVELS VBATI R2221 0ohms 1000-0181 1000-0049 R2220 100Kohms 1000-0231 C2231 22pF N2205 DCDC_COM C1 C2 EN VCON DCDC_IO A1 B1 A3 B3 C2233 10uF 6.3V 1000-0048 C2234 100nF PVIN VDD PGND SGND LM3208TLX 1001-0868 C2235 4.7uF 1000-0039 C2236 100nF 1000-0048 C2237 1000-0049 22pF <NM> SW FB A2 C3 L2207 3.3uH 1200-0092 VCC_WPA VCC_WPA

VDDE18

ST2201 VBUS 1 2 VBUS_VERA 1000-0048 0402 Size Strap

A12

VDD_IO TEST 1000-0048

B10 C2204 100nF A2 D12

SPARE1 SPARE2 TEST REF

C2232 100nF

1A 1000-0061

R2210 0ohms 1000-0257

A13 1000-0051 A14

VREF IREF AB3100 1202-0639 3A

C2208 1uF

R2203 100Kohms 1000-0376

GND Local groundplane on L2 and L3 connect to main ground plane in one point with multiple vias.

Confidential
DCDC_EN WPAVCC DCDC_EN WPAVCC

Approved according to 00021-LXE 107 42/1

KRETSSCHEMA

CIRCUIT DIAGRAM

Sony Ericsson

J TAYLOR 4/8/2008 14

Application & Sys.Performance R. SHARPE Power Regulators & Charging

Circuit Diagram Deena
1200-9416
B 7 of 15

VDDE18_ANJA

D2000 Anja-PoP bottom - POWER GND (logic & I/O) VCORE12 VANA25 D2000 Anja-PoP bottom - POWER VDD I/O (analog) AB8 AB15 D2000 Anja-PoP bottom - POWER VDDCORE (logic) B2 B3 B4 B6 B9 B17 B24 B25 C2 C25 D24 H2 L25 T2 W25 AA2 AD2 AD3 AD24 AD25 AE2 AE24 AE25 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 GND VDDCO_1v2 VDDCO_1v2 C2326 1000-0048 C2327 1000-0048 C2328 1000-0048 C2329 1000-0048 C2331 1000-0048 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 GND VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDDCO_1v2 VDD I/O (1.8V) B21 AC13 AD13 VDD_1 VDD_1 I2CRESETSUPPLY VDD1V2 DB3150FBT/7POPHF 1208-0056 3A C4 E25 M2 N2 P25 V2 V25 1000-0048 1000-0048 1000-0048 AC3 100nF C2340 1000-0048 AE19 VDDIO_1V8 VDDIO_1V8 VDDIO_1V8 VDDIO_1V8 VDDIO_1V8 VDDIO_1V8 VDDIO_1V8 VDDIO_1V8 VDDIO_1V8 VDDIO_1V8 DB3150FBT/7POPHF 1208-0056 3A DB3150FBT/7POPHF 1208-0056 3A GND1 GND1 C2341 1000-0048 V14 F6 AB14 F7 F8 F9 F10 G3 G4 G5 G6 D2000 Anja-PoP bottom - PLL PLL FILTER PLL_26_VCONT PLL_26_FILTVDD PLL_416_VCONT PLL_416_FILTVDD DB3150FBT/7POPHF 1208-0056 3A AE13 G10 AE14 AC15 AE17 H4 C2361 33nF 1000-0068 H5 H6 H7 1000-0068 G11 G12 C2360 33nF G7 G8 G9 GND GND GND GND GND GND GND GND GND 2 VDDE18 STRAP 1 Net VDDE18_ANJA is only used to make the CAD easier due to memory pull-ups R2102 and R2103 ST2241 VDDE18_ANJA D2000 Anja-PoP bottom - POWER GND GND GND GND GND GND GND Require a separate via for each GND symbol shown above. Do NOT share vias from multiple capacitors. GND GND C2330 1000-0048 C2332 1000-0048 GND Require a separate via for each GND pin shown above. Do NOT share vias from multiple balls. GND GND GND GND DB3150FBT/7POPHF 1208-0056 3A GND AD14 AE15 AD12 AB13 AD8 AD11 N3 VDDCO_PLL VDDCO_PLL VCCAD VDDAD VCCDA VCCGPAD VDDCO_AF VDDIO_2V5 VDDIO_2V5 VDD ANALOG VSSCO_PLL VSSCO_PLL VSSAD GNDAD VSSDA VSSGPAD VSSCOMMON AD15 AC14 AE11 AD10 AD9 AC8 AE12 GND GND GND GND GND GND GND GND GND GND GND GND GND J18 J22 K16 K17 K18 L12 L13 L14 L15 L16 L17 L18 M12 M13 M14 M15 M16 M17 N12 N13 N14 N15 N16 N2000 P12 P13 P14 D4 P15 D5 R12 D6 R13 D7 R14 D9 R15 D10 R16 E4 T11 E5 T12 E6 T15 E7 T16 E8 U10 E9 U17 E10 V9 F4 F5 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 AB3100 1202-0639 VDDE18 VANA25 VCORE12 3A Ericsson AB 3100 POWER GROUND VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 H8 H9 H10 H11 H12 J4 J5 J6 J7 J8 J9 J10 J11 K5 K6 K7 K8 K9 K10 K11 L4 L5 L6 L7 L8 L9 L10 L11 M6 M8 M9 M11 M12 VDDE18_ANJA

100nF

100nF

100nF

100nF

100nF C2338 100nF 1000-0048 100nF C2339

AD16

1000-0048

1000-0048 100nF

1000-0048 100nF

C2303

100nF C2324 1000-0048 C2325 1000-0048

C2302 1000-0048

1000-0048

C2308 1000-0048

C2314 1000-0048

C2316 1000-0048

C2318 1000-0048

C2304

C2313

C2315

100nF

100nF

100nF

C2305

C2307

100nF

C2317

C2301

C2311

C2319

100nF

C2322

100nF

C2334

1000-0048

1000-0048

C2336

1000-0048

1000-0048

1000-0048

1000-0048

1000-0048

1000-0048

1000-0048

100nF

100nF

C2337 1000-0048

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

100nF

C2333

C2335

100nF

100nF 100nF

100nF

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

VDDE18 VANA25

Sony Ericsson

J. TAYLOR 4/8/2008 14

Application & Sys.Performance R. SHARPE
VCORE12

Power ASICs

Circuit Diagram Deena
1200-9416
B 8 of 15

VCORE18

VCORE18

D2000 Anja-PoP bottom - POWER VDD MEMORIES K9 1000-0048 1000-0048 1000-0051 L10 M10 N10 P10 R10 T9 U9 U11 C2342 1000-0048 1000-0048 C2347 1000-0051 C2343 U12 U13 U15 1uF U16 U18 V10 V11 V16 V17 VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM VDD_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM GND_MEM DB3150FBT/7POPHF 1208-0056 3A J16 J17 K10 K11 K12 K13 K14 K15 L11 M11 N11 N17 P11 P16 R11 R17 T10 T17 U14 V18

C2344

C2345 100nF 100nF

VCORE18

100nF

100nF

1uF

C2346

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR 4/8/2008 14

Application & Sys.Performance R. SHARPE Power Memories

Circuit Diagram Deena
1200-9416
B 9 of 15

VDDE18

VMC18

VAUDIO26

VBATI

VDIG

VCORE18

VDDE18 VMC18 VAUDIO26 VBATI VDIG VCORE18

VAUDIO26

VDDE18 Page 11 VDDE18 VAUDIO26

OPTOSENSE TESTOUT

OPTOSENSE TESTOUT

OPTOSENSE TESTOUT

VAD TX_ADSTR VBACKUP LD_AD

VAD TX_ADSTR VBACKUP LD_AD

VAD TX_ADSTR VBACKUP LD_AD AID_AD ADC & DAC I2CDAT1 I2CCLK1 I2CDAT1 I2CCLK1 I2CDAT1 I2CCLK1

AID_AD

VAUDIO26 VDDE18

VBATI Page 13 VBATI VDDE18 VAUDIO26 AID_AD DCIO MICN/AUXinR MICP/AUXinL FM_ANTENNA DCIO MICN/AUXinR MICP/AUXinL FM_ANTENNA VBUS DCIO MICN/AUXinR MICP/AUXinL FM_ANTENNA VBUS

SPL SPR SYSCLK2 FLASH_STROBE

SPL SPR SYSCLK2 FLASH_STROBE

SPL SPR SYSCLK2 FLASH_STROBE VDIG Connectivity Page 14 VDDE18 VDIG ONSWAn I2CDAT1 I2CCLK1

VBUS

SERVICEn AP110_VEN

SERVICEn

SERVICEn

VDDE18

ONSWAn

ONSWAn

VDDE18

VMC18

VBATI

Keypad DCDC_ON Page 12 VBATI VMC18 VDDE18 Cards AMPCTRL

VDDE18

VCORE18

VBATI

PAGE 15 VDDE18 VBATI VCORE18 AP110_VEN

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR 4/8/2008 14

RTCCLK AP110_RESn PWRRSTn

RTCCLK AP110_RESn DCDC_ON PWRRSTn AMPCTRL Primary_B15_Connectivity_VideoCC

Application & Sys.Performance R. SHARPE Connectivity Top

Circuit Diagram Deena
1200-9416
B 10 of 15

N2000 R2421 4.7Kohms 1000-0249 TX_ADSTR LD_AD LD_AD AID_AD VAD AID_AD VAD R2422 4.7Kohms 1000-0249 A5 A9 B9 C9 B8 TESTOUT TESTOUT RTEMP OPTOTEMP VBACKUP 1000-0049 OPTOSENSE VBACKUP OPTOSENSE 1000-0051 A8 C8 D8 B7 C7 C10 VAUDIO26 Ericsson AB 3100 OP AND SERVICES GPADC AND AUTOADC TX_ADSTR TXON LDOD GPA0 GPA1 GPA2 GPA3 GPA4 GPA5 GPA6 GPA7 GPA12 VDD_ADC AB3100 1202-0639 Supply acc to Vera spec... 1000-0048 GND VDDE18 Place R2442 and C2431 close to the Thor RF module Place R2443 and C2430 far away from radio PA N2000 D2000 Anja-PoP bottom - CONNECTIVITY SHARED I2C IF (ACC+APP#0) I2CSDA I2CSCL DB3150FBT/7POPHF 1208-0056 3A AD23 AC24 R2401 3.3Kohms 1000-0243 R2402 3.3Kohms 1000-0243 I2CDAT0 I2CCLK0 B13 C13 Ericsson AB 3100 OP AND SERVICES I2C IF SDA SCL AB3100 1202-0639 3A Place Holder If Mammoth is NM C2400 100nF AD_OUT 3A C11 ADC 10bit AUTO CTL

1000-5865

1000-5865

R2442 4.7Kohms

C2431 22pF <NM>

R2443 4.7Kohms

C2430 22pF <NM>

1000-0049

C2450 1uF

VDDE18

D2000 Anja-PoP bottom - CONNECTIVITY APPLICATION I2C (APP#1) I2CSDA2 I2CSCL2 DB3150FBT/7POPHF 1208-0056 3A AB24 AA23

R2403 3.3Kohms 1000-0243

R2404 3.3Kohms 1000-0243 I2CDAT1 I2CCLK1 I2CDAT1 I2CCLK1

VDDE18 VAUDIO26

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson
VDDE18 VAUDIO26

J TAYLOR 4/8/2008 14

Application & Sys.Performance R. SHARPE Connectivity ADC & I2C

Circuit Diagram Deena
1200-9416
B 11 of 15

VMC18 VDDE18 VBATI

VMC18 VMC18 VDDE18 VBATI C2447 1uF

D2000 Anja-PoP bottom - CONNECTIVITY MMC/SD/MSPRO IF MCCLK MCCMD MCDAT0 MCDAT1 MCDAT2 MCDAT3 MCCMDDIR MCDATDIR DB3150FBT/7POPHF 1208-0056 3A AC21 AD21 AC19 AE21 AE20 AD20 AC20 AB21 MCCLK MCCMD MCDAT0 MCDAT1 MCDAT2 MCDAT3 L2430 100nH 1000-3633 1000-4035 R2410 33ohms 1000-0181R2411 0ohms 1000-0181R2412 0ohms 1000-0181R2413 0ohms 1000-0181R2414 0ohms R2415 0ohms R2449 100Kohms 1000-0231 R2448 100Kohms 1000-0231 R2444 100Kohms 1000-0181 <NM> 1000-0231 R2445 100Kohms 1000-0231 R2446 100Kohms R2447 100Kohms Max capacitive load 20-25 pF (see spec.) MC_CLK MC_CMD MCDIO0 MCDIO1 MCDIO2 MCDIO3 X4200 39 33 35 34 36 38 40 37

C2446 33pF 1000-0056

1000-0422 C2445 22pF 1000-0049 C2444 33pF <NM> 1000-0056 C2440 33pF <NM> 1000-0056 C2441 33pF <NM> 1000-0056 C2442 33pF <NM> 1000-0056 C2443 33pF <NM> 1000-0056 Other parts of this connector are located at pages: A02 B14 I02 I03 VDDE18

1000-0231

1000-0231

1000-0051

R2406 470Kohms 1000-4063 MS_DETECT T22

D2000 APPLICATION GPIO_12 DB3150FBT/7POPHF 1208-0056

X2410

SIM IF

VDDE18

VBATI SIMVCC N2000 1000-0048 SIMRSTn 1 ST2400 C2406 1uF R2419 10Kohms 1000-0175 1000-0338 1000-0338 1000-0338 1 2 ST2401 1000-0338 1000-0045 1000-0051 2 SIMCLK SIMDAT

SIM FPCCONNECTOR
1 2 3 7 6 1000-0051 5

R2416 10Kohms 1000-0175 D2000 Anja-PoP bottom - CONNECTIVITY SIM INTERFACE SDAT V12 SCLK AB5 SRSTn V13 SP2407

ERICSSON AB 3100 OP AND SERVICES SIM IF C2429 100nF M3 P2 N3 M1 M2 VBAT_I SIMOFF_N SDAT SCLK SRST_N AB3100 1202-0639 SIMLDO_OUT SIMDAT SIMCLK SIMRST_N 3A L1 P1 N2 N1 C2406, R2419, ST2400, ST2401 close to N2000

Z1 Z2 1201-4486

C2407 100pF

C2408 100pF

C2409 100pF

C2428 C2410 100pF 10nF

C2411 1uF

DB3150FBT/7POPHF 1208-0056

3A C2405 100pF 1000-0338

GND C2407 - C2411 and C2428 close to X2410

SIMDAT and SIMCLK signals to be separated when routing

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J TAYLOR 4/8/2008 14

Application & Sys.Performance R. SHARPE Connectivity Cards

Circuit Diagram Deena
1200-9416
B 12 of 15

D2000 APPLICATION GPIO_01 DB3150FBT/7POPHF 1208-0056 P17 APP_LOG R2473 VAUDIO26 0ohms 1000-0181 3 D2000 VDDE18 ACCESS GPIO_03 DB3150FBT/7POPHF 1208-0056 N2400 ACCESS GPIO_16 DB3150FBT/7POPHF 1208-0056 V5 USB_HSCHIP_SEL VDDE18 R2427 100Kohms 1000-0231 VBATI CFMS_AID R2435 10Kohms 1000-0175 C3 C1 B2 VCCB B1 GND ST1G3234 1000-0369 VCCA A1 A3 A1 2 G 1000-0067 R2439 1Kohms 1000-0172 R2438 470ohms 1000-0240 R9 4 S D2000 1000-0048 VAUDIO26 V2405 3 D R2436 560ohms 1000-0178 C2425 47pF <NM> 1 2 R2437 4.7Kohms 6 D 1000-0249 V2406 UNR32A7 1000-0271 VDDE18 SERVICEn

C2419 100nF 5 G

1000-0270 Si1551DL/NTJD4158CT1G

R2440 is used as a R2440 reference for RID 1Kohms 1000-0230

1000-0061

C2433 10uF

V2405 1000-0270 Si1551DL/NTJD4158CT1G

D2000 ACCESS GPIO_04 P9 USB_HSINCLK

SP2403 R2428 0ohms 1000-0181 SP2409 VCCIO

D2404 USB_OTG_TRANSIVER 1000-0048 F3 B2 B5 VCC VCCIO_1 VCCIO_2 VBUS REG3V3 REG1V8 E3 E6 1000-0048 REG3_3V REG1_8V 1000-0039 1000-0039

R2429 0ohms 1000-0181

D2000 ACCESS GPIO_02 C2476 4.7uF DB3150FBT/7POPHF 1208-0056 T3 CTMS

1000-0048

1208-0056 ACCESS GPIO_01

M9 USB_HSDIR F4 SP2404

C2475 100nF C2474 4.7uF

1208-0056 ACCESS GPIO_00

L9 USB_HSSTP C2413 100nF

C4 E1 B4

TEST CFG0 CFG1 CFG2 CHIP_SEL CLOCK DIR STP NXT DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 XTAL1 XTAL2 RREF ISP1508 1200-1694

NC_1 NC_2

F1 F2

C2473 100nF

1208-0056 ACCESS GPIO_05

1 S

R5 USB_HSNXT B3 C3

R2441 47Kohms AID_AD 1000-0382 VBUS DP DM D1 1000-0156 C1 1000-0049 DCIO D3 D4 GND E2 N2401 C1 VBUS ID C3 C2468 22pF 1000-6829 DCIO

D2000

1208-0056 Anja-PoP bottom - CONNECTIVITY USB TRANSCEIVER IF USB_DAT_VM/UART0TX/USB_HSDATA0 N4 N5 P5

SP2411

A4 E5

USB_HSDATA0 USB_HSDATA1 USB_HSDATA2

D6 D5 B1 A1

USB_DAT_VP/UART0RX/USB_OEn/USB_HSDATA1 USB_OEn/USB_HSDATA2 DB3150FBT/7POPHF 1208-0056 ACCESS GPIO_18

ID PSW_N

C2423 1uF

C2424 10nF

A2 Y4 USB_HSDATA3 A3 A5 1208-0056 ACCESS GPIO_06 A6 T4 USB_HSDATA4 B6 C6 1208-0056 ACCESS GPIO_07 T5 USB_HSDAT5 60 MHz signals careful routing F5 F6 1208-0056 ACCESS GPIO_08 C2 U5 USB_HSDATA6

FAULT

GND_1 GND_2 GND_3

E4 C5 GND GND IP4059CX5/LF 1200-0454

D- A1 1 C

D+ 2 A

1 C

D2

B2

A3

Z1 X2400 V2420 BZX585C15 1000-0272 Z2 2 A V2421 BZX585C15 1000-0272 DCIO GND 9 1001-0890 1001-0890 1001-0890 12 11 10 TCM1210-900-2P-T 1201-6833 R2451 0ohms 8 7 SPR_1 SPL_1 MICN/AUXinR_1 MICP/AUXinL_1 6 5 4 3 2 VBUS_EXT 1 1000-0049 V2425 1000-0076 1203-0723 C2469 22pF L2405 600MHz 47 A1 1201-2253 ESDARF01-1BM2 FM_ANTENNA Signal routed in outer layer and no ground plane underneath! MICP/AUXinL Place C2422 close to system connector GND 1000-0045 1000-0045 MICN/AUXinR MICP/AUXinL MICN/AUXinR FM_ANTENNA A2 1001-0890 1001-0890 1001-0890 1001-0890 1001-0890 1001-0890 1001-0890 1001-0890 1001-0890 1001-0890 1001-0890 No ground plane underneath! Proper routing on D+ and D-. Impedans matched 90 Ohm.

1208-0056 ACCESS GPIO_09 DB3150FBT/7POPHF 1208-0056

1000-0051

U4 USB_HSDATA7 SP2405

C2414 1uF 6.3V

R2426 12Kohms 1% 1000-4147

Z2400 DPext/DTMS 3 P3 P2 2

DMext/DFMS SYSCLK should be set to 26MHz. The 60MHz PLL is better in the ISP1508 than in Anja. R2484 470ohms 1000-0240

4

P4

P1

1

SYSCLK2

SYSCLK2

1000-0179 SPR SPL SPR SPL 100MHz L2404 1200-0317 100MHz L2403 1200-0317 100MHz L2402 1200-0317 100MHz L2401 1200-0317 FLASH_STROBE VBUS_EXT R2465 470Kohms R2433 100Kohms 1000-0231 1000-4063 VDDE18 R2466 470Kohms 1000-4063 C2415 2.2nF 1000-6838 1000-6838 C2416 2.2nF 4 5 6 N2420 NCP360 OUT OUT FLAG IN EN GND GND_SLUG NCP360 1200-6309 3 1 7 GND 2 VBUS_EXT

C2422 1uF 25V

D2000 APPLICATION GPIO_11 DB3150FBT/7POPHF 1208-0056 R2459 0ohms VBATI VDDE18 VAUDIO26 1000-0181 <NM> T25 R2458 0ohms 1000-0181

R2482 100Kohms 1000-0231 VBUS_OVP

C2420 10nF

AP110_VEN

AP110_VEN

Confidential
Approved according to 00021-LXE 107 42/1

C2421 10nF

SCHEMA

DIAGRAM

Sony Ericsson
VBATI VDDE18 VAUDIO26

J TAYLOR 4/8/2008 14

Application & Sys.Performance R. SHARPE Connectivity Connectivity

Circuit Diagram Deena
1200-9416
B 13 of 15

VDDE18

VDIG V2402 ONSWAn 1200-2065 R2450 1Kohms 1000-0172 1000-0056 ONSWAn

C2426 33pF <NM>

VDDE18

VDIG

D2000 Anja-PoP bottom - CONNECTIVITY KEYPAD INTERFACE AC22 AA24 Y24 Y22 W22 AA22 KEYIN0 KEYIN1 KEYIN2 KEYIN3 KEYIN4 KEYIN5 1000-0056 1000-0056 1000-0056 1000-0056 1000-0056 VDDE18 DB3150FBT/7POPHF 1208-0056 3A C2481 33pF C2482 33pF C2483 33pF C2484 33pF C2485 33pF KEYOUT0 KEYOUT1 KEYOUT2 KEYOUT3 KEYOUT4 AB25 AB22 Y25 Y23 AA25 KEYOUT0 KEYOUT1 KEYOUT2 KEYOUT3 KEYOUT4 1000-4110 1000-4110 1000-4110 1000-4110 R2485 220ohms
R2486 220ohms R2487 220ohms R2488 220ohms R2489 220ohms

KEYOUT0_F KEYOUT1_F KEYOUT2_F KEYOUT3_F KEYOUT4_F

70 71 72 41 62

X4200

1000-4110 C C C C V2410 1204-3269 <NM> V2411 1204-3269 <NM> V2412 1204-3269 <NM> V2413 1204-3269 <NM> C V2414 1204-3269 <NM>

1000-0422

A

A

A

A

R2452 10Kohms 1000-0175

R2453 10Kohms 1000-0175

R2454 10Kohms 1000-0175

R2455 10Kohms 1000-0175

R2456 10Kohms 1000-0175

R2457 10Kohms 1000-0175

GND

GND

GND

GND

GND GND 1000-0172 GND GND GND KEYIN5_F KEYIN4_F KEYIN3_F KEYIN2_F KEYIN1_F KEYIN0_F GND REDKEY 20 X4200 63 69 68 84 75 74 1000-0422 Other parts of this connector are located at pages: A02 B12 I02 I03

KEYIN5 KEYIN4 KEYIN3 KEYIN2 KEYIN1 KEYIN0 1000-0056 1000-0056 1000-0056 1000-0056 1000-0056 1000-0056 C2486 33pF C2487 33pF C2488 33pF C2489 33pF C2490 33pF C2491 33pF 1000-0172 1000-0172 1000-0172 1000-0172

R2490 1Kohms R2491 1Kohms R2492 1Kohms R2493 1Kohms R2494 1Kohms R2495 1Kohms

1000-0172

GND

GND

GND

GND

GND

GND

A

X4100

3 12 16 VDDE18 VDIG B2400 D2000 1 1000-0045 3 VCC OUT GND MRUS51S 1000-8451 ST2405 2 1 2 STRAP 1000-0045 FLIP_SENSE V15 APPLICATION GPIO_02 D2000 C2449 10nF 1208-0056 APPLICATION GPIO_13 DB3150FBT/7POPHF 1208-0056 3A AX_INT1 T14 R2462
0ohms 1000-0181

1201-1309 VDDE18 16-PIN connector Another part of this connector is located on page B7 and I4

C2448 10nF

R18 8 11 9

N2450 ACCELEROMETER CS SDO INT_1 SDA/SDI/SDO INT_2 SCL/SPC 1 14 1000-0048 2 C2439 100nF 3 N.C VDD_IO VDD GND GND GND GND GND_RES VDD_RES GND LIS331DL 1202-1676 GND GND 7 6 4 5 12 13 16 10 15 I2CDAT1 I2CCLK1

Check orientation of magnetic field

APPLICATION GPIO_14 DB3150FBT/7POPHF 1208-0056 3A

<NM>

1000-0048

GND

C2437 100nF <NM>

1000-0048

R2463 100Kohms 1000-0231

C2438 100nF

GND

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

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J TAYLOR 4/8/2008 14

Application & Sys.Performance R. SHARPE Connectivity Keypad

Circuit Diagram Deena
1200-9416
B 14 of 15

RTCCLK AP110_RESn AP110_RESn

RTCCLK

D2600

<NM>

AP110_HOST-IF CLOCK AND SYSTEM CONTROL CLKIN SPI INTERFACE APPLICATION GPIO_06 1208-0056 A4 APPLICATION GPIO_09 1208-0056 D2000 APPLICATION GPIO_08 1208-0056 AP110 1200-1968 SP2630 R2638 0ohms 1000-0181 1208-0056 R23 R22 SP2601 AP110_SPI_CLK C4 C3 AP110_SPI_DO D4 SPIMODE SCS SCK SI SO/DATA A6 AP110_SPI_DI N25 APPLICATION GPIO_07 INT_B H5 AP110_INT_B R25 D2000 APPLICATION GPIO_04 P24 AP110_SPI_CS0 G7 RESET_B

G1 D2000 APPLICATION GPIO_03 1208-0056 T18

D2600 AP110_GPIO GPIO

<NM>

GND

R2639 0ohms 1000-0181

PO0 PO1 PO2 PO3 AP110 1200-1968

H3 G4 F5 G5 NC DCDC_ON AMPCTRL DCDC_ON AMPCTRL

L2620 100MHz <NM> PWRRSTn 1000-0051 <NM> C2620 1uF C2607 100nF D2600 <NM> D2600 F2 G8 D3 F7 F4 F6 C5 H2 G6 G3 D7 B6 B3 A2 C7 E4 B7 C6 B8 H7 B1 E2 <NM>

1000-0048

<NM>

AP110_POWER 1.2V PLL SUPPLY F1 PLVDD PLLGND AP110_TESTPINS TESTPINS 1.2V CORE SUPPLY E3 AP110_DVDD H4 D5 TM0 TM1 TM2 TM3 TM4 TM5 TM6 TM7 TM8 TM9 TM10 AP110 1200-1968 GND GND TM11 TM12 TM13 TM14 TM15 TM16 TM17 TM18 TM19/NC TM20/NC TM21 A1 H1 F3 A5 B5 E7 A8 D8 E8 F8 H8 DVDD DVDD DVDD DVDD DVDD DGND DGND DGND DGND DGND

AP110_VEN AP110_VEN R2641 470Kohms 1000-4063 <NM>

GND

GND

1000-0048 <NM> 100nF C2602

<NM> 100nF C2603

1000-0048 <NM> 100nF C2604

<NM> 100nF C2605

1000-0048

E6 1000-0048 C8

GND

1.8V IO SUPPLY B2 G2 H6 EVDD EVDD EVDD EVDD EGND EGND EGND EGND

VDDE18 ST2603 1 STRAP 100nF C2509 1000-0048 <NM> 100nF C2610 1000-0048 <NM> 100nF C2608 2

A7

1.2V SUPPLY INTERNAL E5 1000-0048 <NM> 100nF C2611 TMPW2 AP110 1200-1968 NC

1000-0051

C2627 1uF <NM>

C2628 1uF 1000-0051 <NM>

1000-0048 <NM>

GND

Confidential
Approved according to 00021-LXE 107 42/1
VBATI VCORE18 VDDE18

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J. TAYLOR R. SHARPE Circuit Diagram Deena 4/8/2008 14

APP & SYS PRO
VBATI VCORE18 VDDE18

CONNECTIVITY AUDIO COMPANION CHIP

1200-9416

B 15 of 15

VBATI

VAUDIO26

VBEAR26

VDDE18

VBATI VAUDIO26 VBEAR26 VDDE18

VBEAR26

VAUDIO26

VBATI Page 2 VBATI VAUDIO26 VBEAR26

MICN/AUXinR MICP/AUXinL FMR FML DCDC_ON AMPCTRL

MICN/AUXinR MICP/AUXinL FMR FML DCDC_ON AMPCTRL VAD SPL SPR VAD SPL SPR

Audio Analog

VDDE18

VBATI Page 4 VBATI VDDE18

FM_ANTENNA

FM_ANTENNA

FM_AGPSRESn RTCCLK I2CDAT1 I2CCLK1

FM_AGPSRESn RTCCLK I2CDAT1 I2CCLK1 FM Radio FMR FML

Page 3

Audio Digital

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR R. SHARPE 4/8/2008 14

Audio
Audio Top

Circuit Diagram Deena
1200-9416
A 1 of 4

VBATI

VAUDIO26 VBEAR26

VBATI VAUDIO26 VBEAR26 R3161 2.2Kohms 1000-0388

R3160 5.6Kohms X4200 1000-4046 N3100 SPKRP_1 A1 A3 C1 C3 1000-0052 1000-0052 AUDIO_PA INM VP INP Bypass SHDN OUTA OUTB VM_P VM C3169 220nF NCP2990 1200-4100 GND GND R3150 0ohms GND R3100 0ohms 1000-0179 <NM> B3 A2 C2 1000-0067 1000-0067 B1 B2 R3116 0ohms 1000-0179 Mount R3115 and R3116 close to N3100 1000-0179 R3115 0ohms

L_SP_P L_SP_N CDZ5.6B_LEADFREE 1204-3269 CDZ5.6B_LEADFREE 1204-3269 C3160 47pF C3161 1000-0067 47pF 1000-0067

64 65 C

C3107 47pF

C3108 V3150 47pF

V3151

C3168 220nF

A

C

A

VBATI

GND

GND

VBATI

GND <NM>

GND <NM>

1000-0179 L3150 4.7uH 1201-7463 6 8 5 2 3 4 C3171 220nF

N3102 STEP UP DC-DC 10 1 1000-0066 1000-0061 C3172 10pF C3173 10uF C3174 10uF 1000-4053 1000-0061 R3151 33Kohms AUDIO_PWR

BAT LX REF

OUT FB

DCDC_ON

C3156 10uF

LBO NC_1 NC_2 NCP1422 1000-8812 GND HEATSLUG GND 11 7

1000-0061

C3158 4.7uF

R3162 5.6Kohms 1000-4046

1000-0039

1000-0061

C3170 10uF

1000-0052

R3157 100Kohms

1000-0231

R3152 10Kohms

1000-0175

9

GND

GND

GND N3103 SPKRN_1 R3163 2.2Kohms 1000-0388 A1 A3 C1 AUDIO_PA INM VP INP Bypass SHDN OUTA OUTB VM_P VM C3154 220nF NCP2990 1200-4100 GND GND GND VBATI GND GND GND GND B3 A2 C2 B1 B2 1000-0067 1000-0067 R3154 0ohms 1000-0179 C3177 47pF C3178 47pF V3152 A GND 1000-0179 R3153 0ohms

GND GND

GND

GND

1000-0048

LBI/EN

C3106 100nF

R_SP_P R_SP_N CDZ5.6B_LEADFREE 1204-3269 CDZ5.6B_LEADFREE 1204-3269 C3179 47pF C3180 1000-0067 47pF 1000-0067

GND AMPCTRL 1000-0052 1000-0052 C3

79 78 C V3153 A

C3153 220nF

FMR FML

1000-0340 470nF C3146 C3145 470nF

FM_R FM_L

R3101 100Kohms 1000-0231

C

AMPCTRL

GND

GND

<NM>

GND

<NM>

1000-0340

Should be able to access VBATI between C3112 and N2000

X4200 CCO_INTMIC_1 1000-0056 1000-0377 R3109 100ohms C3117 33pF C3118 10uF 1000-0061 CCO_INTMIC

58 1000-0422

1000-0052

57 1000-0422 1000-0067 C3164 47pF

L3102 600MHz 1203-0723 47

1000-0048 C3121 100nF VAUDIO26 1000-0056 C3162 1000-0245 R3140 15Kohms 33pF VBEAR26 N2000 Ericsson AB 3100 MMI R3130 1Kohms 1000-0172 N10 GND 1000-0056 C3163 33pF PHFMICP PHFMICN FM_L R3131 1Kohms 1000-0172 M10 N9 P9 N8 C3132 100nF P8 N11 P10 P12 P11 C3130 33pF <NM> P7 P13 P6 1000-0061 1000-0048 1000-0056 1000-0056 1000-0056 P3 MIC1P MIC1N MIC2P MIC2N MIC3P MIC3N MIC4P MIC4N LINEIN1 LINEIN2 PLL_DEC3 1000-0056 C3125 100nF 1000-0048 C3127 33pF <NM> C3129 33pF <NM> VDD_SPKR VDD_AUDIO VSS_SPKR VDD_BEAR VSS_BEAR VDD_AUXO AB3100 1202-0639 C3152 33pF 3A PLL_DEC4 AUDIO IF CCO1 CCO2 SPKRP_OUT SPKRN_OUT BEARP_OUT BEARN_OUT AUXO1_OUT AUXO2_OUT MIDR_OUT N13 P14 N7 N6 P5 M5 M4 P4 N4 C3143 33pF 1000-0056

C3137 220nF

C3123 220nF

1000-0056

1000-0052 1000-0056

C3122 33pF <NM>

C3102 33pF <NM>

44 1000-0422

GND C3131 100nF 1000-0048 GND

SPKRP SPKRN BEARP BEARN 1000-0056 1000-0056 R3136 0ohms 1000-0181 C3166 47pF 1000-0067 C3167 47pF 1000-0067 Mount C3139 and C3140 close to N2000 1000-0181 R3135 0ohms

1000-0231

A5 B3 B5

V_MIC INTMICint INTMIC MICP MICN SPL SPR

COO SP_ref

B2 D1 C3119 33pF

1000-0056

Other parts of this connector are located at pages: B07 B12 B14 I02 I03

N3101 TJATTE3

GND C3124 100nF FM_R

31 32

1000-0048 C3133 100nF

1000-0048 R3112 100Kohms

1000-0056

C3126 33pF <NM> 1000-0056 1000-0056

1000-0048

C3139 33pF

C3140 33pF

MICP/AUXinL

D2 D3 D4 D5

MICP_int MICN_int SPL_int SPR_int VAD

A1 A2 A3 A4 B1 C1 C2 C3 C4 C5 B4

GND H14 J12 M7 N5 1000-0069 C3138 47nF 1000-6840 R3134 24Kohms C3155 3.3nF 1000-4152

GND

Other parts of this connector are located at pages: B12 B14 I02 I03

MICN/AUXinR

GND GND GND GND GND GND TJATTE3 1000-0198

C3151 33pF

C3112 10uF

C3135 100nF

C3136 33pF

C3149 220uF SPR_INT AUX02

1200-0311 C3150 220uF SPL_INT AUX01

1000-0388

R3128 2.2Kohms

R3129 2.2Kohms

GND

GND VAD SPR SPL

1000-0388

1200-0311

VAD SPR SPL

Confidential
Approved according to 00021-LXE 107 42/1

KRETSSCHEMA

CIRCUIT DIAGRAM

Sony Ericsson

J TAYLOR R. SHARPE 4/8/2008 14

Audio
Audio Analog

Circuit Diagram Deena
1200-9416
A 2 of 4

D2000 Anja-PoP bottom - AUDIO APP I2S/PCM#0 I2S0CLK/PCM0CLK I2S0WS/PCM0SYN I2S0DLD/PCM0DLD V24 I2S0ULD/PCM0ULD APP I2S/PCM#1 I2S1CLK/PCM1CLK I2S1WS/PCM1SYN I2S1DLD/PCM1DLD W23 I2S1ULD/PCM1ULD DB3150FBT/7POPHF 1208-0056 3A V23 U25 W24 App_I2S0_CLK App_I2S0_WS R3208 0ohms 1000-0181 R3209 0ohms 1000-0181 D2600 AP110_I2S I2S D1 C1 E1 App_I2S0_DATA_B D2 LRCLK1 BCLK1 ASI1 ASO1 AP110 1200-1968 LRCLK2 BCLK2 ASI2 ASO2 C2 D6 B4 A3 <NM> VERA_I2S0_CLK VERA_I2S0_WS App_I2S1_WS App_I2S1_CLK K3 J3 J1 L3 K1 K4 SCK1 WS1 SDI1 SCK2 WS2 SDI2 AB3100 1202-0639 3A SDO2 L2 SDO1 K2 U23 U22 T23 SP3201 SP3202 N2000 Ericsson AB 3100 MMI CODEC IF

App_I2S1_DATA_A

R3201 0ohms R3235 0ohms 1000-0181 R3200 0ohms 1000-0181 1000-0181

App_I2S0_DATA_A

App_I2S1_DATA_B

R3202 0ohms 1000-0181

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR R. SHARPE 4/8/2008 14

Audio
Audio Digital

Circuit Diagram Deena 1200-9416
A 3 of 4

VBATI VDDE18

VBATI VDDE18

VDDE18

N1400 BLUETOOTH-FM_FM C3306 100pF FM_ANTENNA 1200-0317 Signal routed in outer layer and no groundplane underneath FM_ANTENNA L3300 270nH 1000-1899 SP3300 1000-0338 B8 FM_FMIP FM_ROUT C8 FM_RFGND FM_LOUT C5 B5 FMR FMR FML FML D4 F7 F8 L4 L5 L6 FM_RADIO_IO

L3301 100MHz 1.8k

FM_AGPSRESn

GND

FM_AGPSRESn

C9 D9

FM_RST FM_SENB FM_SCL FM_SDA FM_RTCCLK

NC NC NC NC NC NC

I2CCLK1 I2CDAT1 1000-0181 RTCCLK 1000-0043 R3301 0ohms C3302 68pF <NM> VBATI VDDE18

E9 D8 D7

A7 A6 VBATI available on toplayer A5

FM_GPIO1 FM_GPIO2 FM_GPIO3 FM_PWR_GND FM_VA FM_VD FM_VIO FM_GND FM_GND FM_GND FM_GND

A4 B3 D6 1000-0048

A3 B4 B6 B7 C4 C6 C7 D5

C3304 100nF

C3305 100nF 1000-0048

FM_GND FM_GND FM_GND FM_GND STLC2592 1200-6182

FM_INT

D2000 R3300 3.3Kohms P18 1000-0243 DB3150FBT/7POPHF 1208-0056 3A APPLICATION GPIO_00

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR R. SHARPE 4/8/2008 14

Audio
FM Radio

Circuit Diagram Deena
1200-9416
A 4 of 4

D2000 Anja-PoP bottom - TEST JTAG & EMULATION IF P3 P2 R2 R3 C24 R5100 10Kohms <NM> 1000-0175 C3 TDI TMS TRSTn TCK TEMU0n TEMU1n DB3150FBT/7POPHF 1208-0056 3A TDO RTCK P4 R4

D2000 Anja-PoP bottom - NOTUSED UNUSED N9 D2000 Anja-PoP bottom - TEST EMBEDED TRACE IF ETM_TCLK ETM_TSYNC C8 E7 EFUSE_HV4 NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused DB3150FBT/7POPHF 1208-0056 D2000 ANJA-POP-BOT_SUPPORT-BALLS A1 E6 A2 A3 A24 A25 A26 B1 B26 C1 C26 NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused DB3150FBT/7POPHF 1208-0056 NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused NetUnused 3A AD1 AD26 AE1 AE26 AF1 AF2 AF3 AF24 AF25 AF26 3A C5 D17 E23 G25 N23 V22 AB2 AC25 AE3 AE4 AE16 AE23

ETM_TPKT0 B10 ETM_TPKT1 E10 ETM_TPKT2 ETM_TPKT3 ETM_TPKT4 ETM_TPKT5 ETM_TPKT6 ETM_TPKT7 ETM_PSTAT0 ETM_PSTAT1 ETM_PSTAT2 VDDE18 DB3150FBT/7POPHF 1208-0056 3A D8 E9 D9 D7 C9 B8 E8 B7

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR R. SHARPE 4/8/2008 14

Test
Test

Circuit Diagram Deena
1200-9416
T 1 of 1

VBATI VDDE18

VccA

VCC_WPA

VDIG

VBT27 VAGPS28 VAGPS20 VCC_WPA VccA VDDE18 VBATI Page 2

WPAVCC

VBATI VDDE18 VBATI VccA VCC_WPA VDIG VBT27 VAGPS28 VAGPS20 MCLKREQ D2000 Anja-PoP bottom - ACCESS RADIO CTRLIF RF_CTRL_DATA RF_CTRL_CLK RF_CTRL_STRB1 RF_CTRL_STRB2 AD6 AE6 AE5 AD5 AB3100 1202-0639 3A MCLKREQ RADDAT RADCLK RADSTR RADSTR2 MCLKREQ RADDAT RADCLK RADSTR RADSTR2 ANT MCLK TESTOUT ANT MCLK TESTOUT MCLK TESTOUT C4 B5 C5 DAC_CLK DAC_STR DAC_DAT N2000 Ericsson AB 3100 OP AND SERVICES DAC DACO_0 DACO_1 DACO_2 DACO_3 A7 B6 A6 C6 TX_VGA WPAVCC BIAS_CTRL BIAS_CTRL TX_VGA VDDE18 VccA VCC_WPA

ANT_SW0 ANT_SW1 ANT_SW2 ANT_SW3 TX_ADC_STRB EGGRADIOIF RF_DATA_A RF_DATA_B RF_DATA_C RF_DATA_STRB WCDMAPAIF RF_WCDMA_PA_0_EN RF_WCDMA_PA_1_EN RF_WCDMA_DCDC_EN RF_WCDMA_PWRDET_EN WCDMARADIOIF AC12 AB12 AB11 AC11 AE9 ADC_I_NEG ADC_I_POS ADC_Q_NEG ADC_Q_POS TX_POW DB3150FBT/7POPHF 1208-0056 3A DAC_I_NEG DAC_I_POS DAC_Q_NEG DAC_Q_POS

AC4 AB7 AC7 AD7 AA3

ANTSW0 ANTSW1 ANTSW2 ANTSW3

ANTSW0 ANTSW1 ANTSW2 ANTSW3

AC6 AD4 AC5 AB3

QDATA_AMP_MSB IDATA_FREQ_MSB AMP_LSB_FREQ_LSB DCLK_DATSTR

QDATA_AMP_MSB IDATA_FREQ_MSB AMP_LSB_FREQ_LSB DCLK_DATSTR

AE10 AB6 AE7 AE8

WPA0_EN WPA1_EN

WPA0_EN WPA1_EN

WDETON

WDETON

LD_AD

LD_AD

LD_AD

AC10 AB10 AB9 AC9

TXIB TXIA TXQB TXQA

TXIB TXIA TXQB TXQA

RXIB RXIA RXQB RXQA WTXPOWDET

GSM & UMTS WTXPOWDET RXQA RXQB RXIA RXIB TX_ADSTR DCDC_EN TX_ADSTR DCDC_EN

Following signals to be routed as differential pairs: TXIA & TXIB ; TXQA & TXQB RXIB & RXIA ; RXQA & RXQB

VDDE18

VAGPS28

VAGPS20

Page 4 VAGPS28 VAGPS20 ANT VDDE18 AGPSANT TX_ADSTR BT_ANT Primary_R05_Antenna PAGE 5

AGPSANT BT_CLK RTCCLK FM_AGPSRESn FM_AGPSRESn

AGPSANT BT_CLK RTCCLK FM_AGPSRESn

VBT27

VDIG VDDE18

AGPS

Page 3 VDDE18 VDIG BT_CLKREQ VBT27 BT_CLK RTCCLK BTRESn BT_CLK RTCCLK BTRESn BT_CLK RTCCLK BTRESn

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR R. SHARPE 4/8/2008 14

Access
BT_ANT BT_CLKREQ Bluetooth BT_ANT BT_CLKREQ

Access Top

Circuit Diagram Deena
1200-9416
R 1 of 5

N1200 X1200 ANTSW0 ANTSW1 ANTSW2 ANTSW3 MCLKREQ AMP_LSB_FREQ_LSB RADCLK RADDAT RADSTR ANTSW0 ANTSW1 ANTSW2 ANTSW3 MCLKREQ AMP_LSB_FREQ_LSB RADCLK RADDAT RADSTR VccA R1203 100Kohms 1000-0231 VDDE18 VBATI J8 ANTSW0 THOR_MODULE ANTSTRIP K8 WCDMA1900 K7 WCDMA2100 K6 WCDMA850 DCLK_DATSTR J7 J1 R1219 0ohms 1000-0181 R1220 0ohms 1000-0181 C Z1 C_TERM GND MS-156A 1204-6720 A_TERM GND A Z2 ANT

H8 ANTSW2 A5 ANTSW3 H2 MCLKREQ K2 AMP_LSB_FREQ_LSB E2 RADCLK C2 RADDAT J4 RADSTR1

1000-6058

H7 ANTSW1

C1200 0.56pF <NM>

IDATA_FREQ_MSB H1 QDATA_AMP_MSB J2

MCLK F1 TESTOUT F2 WBCLK E1

SP1200 B5 VBAT B6 VBAT

PWR_GND

GND14 C1 GND15 C7 GND16 C8 GND17 B1 GND18 B2 GND19 B3 GND20 B4 GND21 B7 GND22 B8 GND23 A1 GND24 A2 GND25 A3 GND26 A4 GND27 A6 GND28 A7 GND29 A8 GND30 SH1 MCLK MCLK TESTOUT TESTOUT WBCLK LD_AD N1210 LD_AD

K1 VDIGRAD_1V8 K3 VRADA_2V75 K4 GND1 K5 GND2 J3 J5 J6 GND3 GND4 GND5

F7 GND6 F8 GND7 E7 GND8 E8 GND9 D1 GND10 D2 GND11 D7 GND12 D8 GND13

THOR 1200-0158 QDATA_AMP_MSB IDATA_FREQ_MSB DCLK_DATSTR R1204 100Kohms <NM> 1000-0231 TXIA TXIB TXQA TXQB WPA1_EN TX_VGA WPA0_EN WDETON SP1202 R1205 100Kohms <NM> 1000-0231 QDATA_AMP_MSB IDATA_FREQ_MSB DCLK_DATSTR WCDMA2100 SP1201 WCDMA1900 WCDMA850 TXIA TXIB TXQA TXQB WPA1_EN TX_VGA WPA0_EN WDETON A9 A7 A8 C2 C1 J5 J4 H3 J3 H2 B2 WB2100 WB1900 WB850 WTX_IA WTX_IB WTX_QA WTX_QB TX_EN TX_VGA WRFIC_ON PASENSE_EN

WRX_IA WRX_IB WRX_QA WRX_QB WTXPOWERSENSE BIAS_CTRL

E1 F1 G1 H1 B1 H10

RXIA_UMTS RXIB_UMTS RXQA_UMTS RXQB_UMTS

1000-4102 R1206 200ohms 1000-4102 R1207 200ohms 1000-4102 R1208 200ohms R1209 200ohms 1000-4102

RXIA RXIB RXQA RXQB WTXPOWDET

RXIA RXIB RXQA RXQB WTXPOWDET

RADCLK RADDAT

G2 F2 H4 VCC_WPA VBATI VccA VDDE18 E2

RADCLK RADDAT RADSTR2

WBCLK

D1

RADSTR2

RADSTR2

LD

J2 D2 F10 G10 BIAS_CTRL BIAS_CTRL G9 H9

VDIGRAD_1V8 VRADA_2V75 VBAT1 VBAT2 VCC_PA1 VCC_PA2

GND13 GND14 GND15 GND16 GND17 GND18 GND19 GND20

H8 H7 H6 H5 B5 J6 A4 D9 E9 C9 B9 J8 B3 B4 J9 B6 J1 B7 B8 F9 SLUG

1000-0048

A3 C1252 100nF A2 A1 A6 GND A5 A10 B10 C10 D10

GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12

GND21 GND22 GND23 GND24 GND25 GND26 GND27 GND28 GND29 GND30 GND31 GND32 SLUG

Confidential
Approved according to 00021-LXE 107 42/1

VBATI VDDE18

VccA

VCC_WPA E10 J10

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR R. SHARPE 4/8/2008 14

VBATI VDDE18 VccA VCC_WPA

J7

Access
GSM & UMTS

MAMMOTH_MODULE 1200-0245

Circuit Diagram Deena
1200-9416
R 2 of 5

The routing of MCLK should be done with extra care, i.e to avoid noisy signals. It is crucial that the reference clock supplied to BT is free of noise to be able to guarantee a good radio performance. Especially cross talks from surrounding digital signals must be avoided. The MCLK should be route in a starpoint at generation, with a dedicated track for only the BT. Buffer that can be bypassed is just recommended. BTRESn BT_CLK RTCCLK K7 F6 K9

N1400 BLUETOOTH-FM_IO BT_SYSCON BT_RSTn BT_REF_CLK_IN BT_RTCCLK BT_REG_CTRL J4

E7 F9

BT_CLKREQ_IN1 BT_CLKREQ_IN2

BT_CLKREQ_OUT1 BT_CLKREQ_OUT2

J7 J8 SP1412 SP1413 SP1414 D2000 BT_SPI_INT W2 ACCESS GPIO_14 BT_CLKREQ BT_CLKREQ

SP1410 SP1411 D2000 ACCESS GPIO_21 1208-0056 ACCESS GPIO_22 DB3150FBT/7POPHF 1208-0056 3A PCMCLK PCMSYN PCMDATB PCMDATA D2000 Anja-PoP bottom - BLUETOOTH Y3 BT_SPI_CLK W4 BT_SPI_DO

L9

BT_WAKEUP

HOST_WAKEUP/SPI_INT

E8

UART_&_SPI-INTERFACE H9 K6 UART_RXD/SPI_DI UART_TXD/SPI_DO G7 J6 BT_SPI_CSn PCM_INTERFACE M4 N4 K5 M5 BT_PCM_CLK BT_PCM_SYNC BT_PCM_A BT_PCM_B GPIO VDIG VDDE18 VBT27 N1400 BLUETOOTH-FM_POWER BTPOWER&GND ST1404 BT_GPIO_11 K3 1 2 N7 L2 D3 E1 E2 E4 CONFIG-PINS L7 M7 N6 BT_CONFIG_1 BT_CONFIG_2 BT_CONFIG_3 TESTPINS G6 BT_AF_PRG BT_TEST1 BT_TEST2 RF BT_RFP BT_RFN DO-NOT-USE BT_RSRV_D BT_RSRV_RF BT_RSRV_CL BT_RSRV_DSM BT_RSRV_N BT_RSRV_CL STLC2592 1200-6182 K1 J1 5 7 6 M8 M2 B2 C1 C2 C3 STLC2592 1200-6182 DEA202450BT 1200-1865 8 Z1400 DEA202450BT-7089 BAL1 BAL2 GND1 GND2 UNBAL NC1 NC2 GND3 1 2 3 4 BT_ANT BT_ANT C1407-C1409 close to N1400 M6 J9 N3 N5 G8 1000-0048 1000-0048 1000-0048 BT_HVD BT_HVA1 BT_HVA2 BT_HVA2 BT_HVA2 BT_HVA2 BT_VIO_A BT_VIO_B BT_VIO_C BT_VIO_D BT_VIO_E BT_VSS_ANA BT_VSS_ANA BT_VSS_ANA BT_VSS_ANA BT_VSS_ANA BT_VSS_ANA BT_VSS_ANA BT_VSS_ANA BT_VSS_ANA C1409 100nF BT_VSS_ANA BT_VSS_ANA BT_VSS_ANA BT_VSS_DIG BT_VSS_DIG BT_VSS_DIG BT_VSS_DIG BT_VSS_DIG BT_VSS_RF BT_VSS_RF BT_VSS_RF BT_VSS_RF D1 D2 E3 F1 F2 F3 F4 G3 G4 H3 H4 G1 H6 H7 H8 K8 L8 H1 J2 K2 L1 BT_VDD_CLD E6 1000-0048 C1412 100nF <NM> C1412 close to N1400 VDDE18 DB3150FBT/7POPHF 1208-0056 3A VBT27 star connection between L2,D3,E1,E2,E4 if possible Y2 ACCESS GPIO_19 'VSS_RF' should be separated from other VSS, with a clearance of min 0.2mm, on the top layer, first and second internal layer. The 'VSS' of the B-BPF and the BT antenna should also be connected to this 'VSS_RF.' BT_SPI_DI W3 ACCESS GPIO_20

UART_CTS/SPI_CLK UART_RTS/SPI_CSn

BLUETOOTH PCM/I2S (ACCESS) PCMCLK/I2SCLK PCMSYN/I2SWS PCMDLD/I2SDLD AB4 PCMULD/I2SULD DB3150FBT/7POPHF 1208-0056 3A AA5 AA4 AC2 G9 L3 M3 K4 J3 VDDE18 BT_GPIO_0 BT_GPIO_8 BT_GPIO_9 BT_GPIO_10 BT_GPIO_16

Do not connect pin G6!

H2 G2

C1407 100nF

C1408 100nF

VDDE18

VDIG

VBT27

VDDE18 VDIG VBT27

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR R. SHARPE 4/8/2008 14

Access
Bluetooth

Circuit Diagram Deena
1200-9416
R 3 of 5

VAGPS28 VAGPS20

VDDE18

VAGPS28 VAGPS20 VDDE18

ST1430 RTCCLK RTCCLK 1 2 R1434 10Kohms <NM> 1000-0175

ST1432 TX_ADSTR TX_ADSTR 1 2

N1430 ST1434 FM_AGPSRESn D2000 ST1433 ACCESS GPIO_15 V4 1 ST1435 1208-0056 ACCESS GPIO_17 DB3150FBT/7POPHF 1208-0056 3A AGPS_SYNC R1448 100Kohms 1000-0231 VAGPS28 B1430 4 1000-0039 1 C1430 4.7uF C1431 100nF 1000-0048 VCC VCONT ERC3135A 1200-7847 27.456MHz OUT GND 3 2 VAGPS28 1000-6838 R1433 10Kohms <NM> 1000-0175 C1452 1000-0338 100pF R1438 10Kohms <NM> 1000-0175 C3 C4 AGPS_TX AGPS_RX B2 A1 A2 B3 N1435 1 2 4 5 C1453 10pF 3 1000-0045 1000-0066 7 LNA_IN DC_BIAS POWER_ON_CONTROL VCC LP09A 1200-0660 1575.42Mhz RF_GND GND_DC BGA615L71 1200-2407 B5 D6 C6 C7 TDI TMS TCK nTRST PMB2525 1200-0700 JTAG TDO C5 C1441 220nF C1437 100nF C1436 100nF C1435 100nF C1433 100nF 2 LNA_OUT 6 1 Z1431 IN OUT OUT GND GND 3 4 5 L1434 6.8nH 1200-0174 G7 G6 1000-0052 1000-0048 1000-0048 1000-0048 1000-0048 LNA_OUT LNA_IN EXT_LNA F5 PMB2525 1200-0700 1A MIXINP_AGPS MIXINM_AGPS E6 F6 MIX_IN_PLUS MIX_IN_MINUS RF R1437 100Kohms 1000-0231 VDDE18 E3 D3 G2 OMS0 ConfigHostIFI2C,SPI,UART OMS1 OMS2 1000-0048 1000-0051 1000-0048 A6 B4 A5 B6 C1440 100nF D1 C1 VDD_COREREG_IN VDD_COREREG_OUT VSS_DIG_1 G1 G3 B7 E7 VDD_CORE_1 VDD_CORE_2 VDD_CORE_3 VDD_CAP VSS_DIG_2 VSS_DIG_3 VSS_DIG_4 VSS_LNA D7 D5 D2 B1 E4 VDD_LP_PLLREG_IN VDD_LPREG_OUT VDD_PLL VDD_LP VSS_RF_1 VSS_RF_2 G4 E5 VAGPS20 VDDE18 D4 A3 TCXO_AGPS A4 SYNC CNTIN CLK Y5 1 2 AGPS_RSTn 1000-0048 1000-0049 F3 1000-0048 1000-0049 nRESET 2 AGPS_PWRON TX_ADSTR_AGPS E2 F2 FM_AGPSRESn 1 2 PMB2525_Hammerhead _Power_distribution 1000-0048 RTCCLK_AGPS E1 RTCCLK POWERON RX_HOLD GND SYSCON nINTR F1 N1430 PMB2525HammerheadPower GPSPowerandGround C1448 100nF F4 G5 F7 VDD_RFREG_IN VDD_RF VDD_VCO VDDE18 VAGPS28

C1446 100nF

C2 A7 1000-0048 1000-0048

C1439 22pF

VDD_IO_1 VDD_IO_2

C1434 C1447 100nF 22pF

BT_CLK

C1444 100nF

C1445 100nF

HIF1 HIF2 HIF3 HIF4 HIF5

1000-0051

HIF0

HostIF

GND

C1451 2.2nF

C1442 1uF

C1443 100nF

C1438 1uF

Z1430 AGPSANT 4 3 2 IN GND GND GND LN94A 1200-0607 1575.42Mhz OUT 1

1000-6073 C1454 4.7pF

1200-2416 L1437 1200-2414

5 L1436 3.3nH

33nH

C1449 10nF

D2000 ST1413 ACCESS GPIO_10 U3 UART3_RX 1 ST1414 ACCESS GPIO_11 U2 UART3_TX 1 ST1415 ACCESS GPIO_12 V3 UART3_CTS 1 ST1416 ACCESS GPIO_13 DB3150FBT/7POPHF 1208-0056 3A W5 UART3_RTS 1 2 2 2 2

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR R. SHARPE 4/8/2008 14

Access
AGPS

Circuit Diagram Deena
1200-9416
R 4 of 5

L1503

4.3nH

L1504 4.7nH 1001-1119 1209-8971 1209-8888

C1504 2.7pF

1001-6151 1209-8937

1210-0202 10nH 1001-0370 Z1502 1 5 3 GND GND GND 2 6 4 GND3 4 3 GND2 2 GND1 Hot_term 1 X1501 1001-0637 W_FL-R-SMT-1_10

Z1501 ANT 2 4 6

<NM> 1 3

L1502

C1501 1.9pF

C1502 2.4pF

C1503 0.3pF

GND_1

ANT

ANT HI_BAND LO_BAND

GND_1 GND_2 GND_3

GND_2 HI_BAND GND_3 LO_BAND

GND 5 GND

DPX201990DT-4011D2 1201-3932 1.71GHz

GND R1504 0ohms 1000-0179 <NM> 1000-6067 C1505 1.2pF <NM> R1505 0ohms 1000-0179 <NM> 1000-6067 C1506 1.2pF <NM> R1506 0ohms 1000-0179 <NM> C1507 1.2pF <NM> 1000-6067 C1508 1.2pF <NM>

DPX201990DT-4136A1 1201-6269 1.71GHz <NM> GND

1000-6067 GND

GND

GND

GND

BT_ANT C1509 33pF <NM> 1000-0056

R1507 0ohms 1000-0179

1 <NM> 2 C1510 33pF 1000-0056

X1502

1201-4488 GND

GND

GND

C1511 12pF C1512 12pF AGPSANT 1000-0056

C1515 6.8pF

1 2 C1514 1pF

X1503

15nH

C1513 33pF <NM>

1001-1173

1000-6120 1000-6120

1000-5959

1201-4488

L1501

1000-0117 GND GND GND

GND

Confidential
Approved according to 00021-LXE 107 42/1

SCHEMA

DIAGRAM

Sony Ericsson

J. TAYLOR R. SHARPE 4/8/2008 14

Access ANTENNA

Circuit Diagram Deena
1200-9416
R 5 of 5


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